JBL MS-8, Service Manual, Page: 91 / 110

Philips Semiconductors Product specification
Octal buffer/line driver with 30
Ω
series termination
resistors; 5 V input/output tolerant; 3-state
74LVC2244A
FEATURES
•
5 V tolerant inputs/outputs for interfacing with 5 V logic
•
Wide supply voltage range of 1.2 to 3.6 V
•
CMOS low power consumption
•
Direct interface with TTL levels
•
Integrated 30
Ω
termination resistors.
DESCRIPTION
The 74LVC2244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In
3-state operation, outputs can handle 5 V. These features
allow the use of these devices as translators in a mixed
3.3/5 V environment.
The 74LVC2244A is an octal non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE. A
HIGH on nOE causes the outputs to assume a
high-impedance OFF-state. Schmitt-trigger action at all
inputs makes the circuit highly tolerant for slower input rise
and fall times. The 74LVC2244A is designed with 30
Ω
series termination resistors in both HIGH and LOW output
stages to reduce line noise.
QUICK REFERENCE DATA
Ground = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns.
Note
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µ
W).
P
D
= C
PD
×
V
CC
2
×
f
i
+
Σ
(C
L
×
V
CC
2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
Σ
(C
L
×
V
CC
2
×
f
o
) = sum of the outputs.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
t
PHL
/t
PLH
propagation delay 1A
n
to 1Y
n
; 2A
n
to 2Y
n
C
L
= 50 pF; V
CC
= 3.3 V 4.0 ns
C
I
input capacitance 5.0 pF
C
PD
power dissipation capacitance per buffer V
I
= GND to V
CC
; note 1 25 pF
MS-8
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