JBL DCR600 II, Service Manual

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TL/F/5313
MM54HC151/MM74HC151
8-Channel
Digital
Multiplexer
November 1995
MM54HC151/MM74HC151 8-Channel
Digital Multiplexer
General Description
This high speed Digital multiplexer utilizes advanced silicon-
gate CMOS technology. Along with the high noise immunity
and low power dissipation of standard CMOS integrated cir-
cuits, it possesses the ability to drive 10 LS-TTL loads. The
MM54HC151/MM74HC151 selects one of the 8 data sourc-
es, depending on the address presented on the A, B, and C
inputs. It features both true (Y) and complement (W) out-
puts. The STROBE input must be at a low logic level to
enable this multiplexer. A high logic level at the STROBE
forces the W output high and the Y output low.
The 54HC/74HC logic family is functionally as well as pin-
out compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground.
Features
Y
Typical propagation delay
data select to output Y: 26 ns
Y
Wide operating supply voltage range: 2 – 6V
Y
Low input current: 1 m A maximum
Y
Low quiescent supply current: 80 m A maximum (74HC)
Y
High output drive current: 4 mA minimum
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5313 – 1
Top View
Order Number MM54HC151 or MM74HC151
Truth Table
Inputs Outputs
Select
Strobe
C B A
S Y W
X X X H L H
L L L L D0 D0
L L H L D1 D1
L H L L D2 D2
L H H L D3 D3
H L L L D4 D4
H L H L D5 D5
H H L L D6 D6
H H H L D7 D7
H
e
High Level, L
e
Low Level, X
e
Don’t Care
D0, D1...D7
e
the level of the respective D input
TL/F/5313 – 2
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
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