I
NTEGRATED
C
IRCUITS
D
IVISION
LITELINK III Evaluation Board Users Guide
UG-CPC5622-EVAL-600R - Rev A
www.ixysic.com
11
6. LITELINK Design Resources
The schematic and printed circuit board design files
can be found on the IXYS IC Division web site. They
contain design specifications and notes to help guide
you through your own design.
You will notice the values for many of the components
have been altered from those shown in our other
documentation. This is necessary to provide the noise
cancellation feature not available in the application
circuits presented in the legacy documentation. A
formatted BOM used to assemble the evaluation
boards can be found in the on-line design files.
To use the noise cancellation method presented in the
CPC5622-EVAL-600R evaluation board it is
necessary to follow the layout design fairly closely. The
capacitive coupling of the NTS node to the low voltage
side ground is a function of the PCB capacitor’s
copper shapes and separations. Additionally, parasitic
capacitive coupling between NTS and the nets on the
high voltage line side will reduce the desired coupling
between NTS and the low voltage side ground.
Changes to either the desired or parasitic capacitive
coupling may require retuning of the cancellation
circuit.
For additional information please visit
www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification:
UG-CPC5622-EVAL-600R-Rev A
Copyright © 2013, IXYS Integrated Circuits Division
LITELINK is a registered trademark of IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
12/31/2013
