I
NTEGRATED
C
IRCUITS
D
IVISION
LITELINK III Evaluation Board Users Guide
8
www.ixysic.com
UG-CPC5622-EVAL-600R - Rev A
5. CPC5622-EVAL-600R Design
Figure 3. LITELINK CPC5622A Schematic
Low Voltage Sid
e
High Voltage S
ide
Low Voltage Sid
e
High Voltage S
id
e
B
A
A
Low Voltage Sid
e
B
D
is
tr
ibuted Barrier
High Voltage S
ide
Barri
e
r
Barrier
C_PCB
Not Discrete
LIU*
POLARITY
LOOP
BR-
BR-
BR-
RING
BR+
RING2*
TX-_IN
TX+_I
N
RX+_O
U
T
BR-
BR-
BR-
OH*
RING*
RX-_OUT
TIP
VCC
BR-
BR-
BR-
BR-
LOOP
LIU*
POLARITY
TIP
RING
3.3VA
VCC
C16
220pF
5%
2000V
C1808
R7
49.9
C9 DNP 0603
R6
3.32K
Q1
CPC5603C
415V
1
3
24
R2
191K
C10
100pF
5%
50V
R23
1.82M
1/4W
1206
U1
CPC5622A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VDD
TXSM
TX-
TX+
TX
MODE
GND
OH
RING
RING2
RX-
RX+
SNP+
SNP-
RXF
RX
VDDL
RXS
PB
BR-
ZDC
DCS2
DCS1
NTF
GAT
NTS
BR-
TXSL
ZNT
ZTX
TXF
REF
R26
1.5M
R22
1.82M
1/4W
1206
C4a
100nF
R15
6.98
1/8W
0805
C4b
DNP
0805
R12
499K
J1
1
2
R20
232K
Q2
395V
C1
10uF
1206
10V
R13
1M
0805
1/8W
R18
68.1
C6a 100nF
R4
DNP
C5a 100nF
R3
DNP
R1
2
5%
R17
6.49M
0805
1/8W
R16
6.49M
0805
1/8W
C12
10nF
0603
5%
100V
R19
210K
C7a 100nF
R10
143K
R24
1.82M
1/4W
1206
C14
10nF
500V
0805
J2
1
2
3
4
5
6
7
8
9
10
11
12
C11
100nF
0603
50V
5%
R5
137K
C3
DNP
F1
DNP
C2
100nF
C5b
DNP
0805
C15
220pF
5%
2000V
C1808
R8
301
C17
15pF
50V
5%
C13
10nF
100V
0603
5%
C7b
DNP
0805
R11
261K
C6b
DNP
0805
R9
0
R21
2
5%
-
+
D1
S1ZB60
600V
2
1
3
4
R14
1.82M
R25
1.82M
1/4W
1206
C8
100nF
