IXIA AFD2 Manual Download Page 9

Ixia Platform Reference Manual Manual, Release 6.30

15-9

Ixia IRIG-B Auxiliary Function Device (AFD2)

Front Panel LEDs

Front Panel LEDs

The AFD2 has the following front panel LEDs:

IXIA AFD2 Specifications

The IXIA AFD2 specifications are contained in 

Table 15-4

 on page 15-9.

Table 15-3. AFD2 LEDs

Label

Color

Description

USB

Green

Indicates that the connection is enabled, and glows 
solid with USB activity.

1PPS

Green

Indicates that the ‘1 Pulse Per Second’ heartbeat is 
being generated by the IRIG-B hardware. 

Pwr OK

Green

The AFD2 power has been validated.

Lock

Green

Indicates that the internal PLL has locked to the 
1PPS signal. Testing is invalidated if the IRIG-B 
Lock signal is not illuminated.

Table 15-4. Ixia AFD2 Specifications

General

Physical

Size

9.6"x7"x2.9" ( with feet, 2.70" without feet)

Weight

3.15 lb

Avg. Shipping Wt.

6 lbs

Shipping Vibration

FED-STD-101C, Method 5019.1/5020.1

Environmental

Temperature

Operating

41

°

F to 122

°

F, (5

°

C to 50

°

C)

Storage

41

°

F to 122

°

F, (5

°

C to 50

°

C)

Power

Worst case power = 2.5W

5V regulated source

Humidity

Operating

0% to 85%, non-condensing

Storage

0% to 85%, non-condensing

Summary of Contents for AFD2

Page 1: ...IA AFD2 with integrated IRIG B is designed to provide 12 5 MHz GPS clock with a programmable 80 ns sync pulse to the Optixia chassis The Ixia AFD2 IRIG B receiver is controlled by an Ixia chassis thro...

Page 2: ...y latency measurements by subtraction of the transmit time stamp from the receive time stamp For large or very remote chassis chains the chassis chain properties provide an offset delay This delay is...

Page 3: ...e Source Synchronous IRIG B AFD2 IRIG B Mode B000 B000 is straight TTL serial output from the IRIG B receiver B120 B120 is amplitude modulation AM from the IRIG B receiver IRIG B Status Lock Status Lo...

Page 4: ...n of IRIG B as the timer source the IRIG B status is displayed In Figure 15 3 on page 15 3 the status is locked to the 1PPS signal coming from the IRIG B receiver In the chassis tree view of IxExplore...

Page 5: ...fore Attaching AFD2 Changing Time Source Any time the clock source is switched IxServer must be restarted When the chassis is switched from Synchronous time source to IRIG B or vice versa the followin...

Page 6: ...e there is no IRIG B information and the status is Unlocked in the Time Sources tab of Chassis Properties in IxExplorer Figure 15 3 on page 15 3 then one of the following conditions needs to be correc...

Page 7: ...d by one or more Ixia software users located likewise anywhere in the world Where IRIG B and CDMA sources are used all of the sources must have good quality time values in order for the trigger to be...

Page 8: ...B Tb Time Absolute T Time Error at any site Terr Lab Ta T1 Tb Lba Tb T2 Ta Delta L Lab Lba Delta L Ta T1 Tb Tb T2 Ta Delta L T1 T2 2 Ta Tb Delta L 2 Ta Tb If Ta T Terr and Tb T Terr Then Delta L 2 T...

Page 9: ...nd heartbeat is being generated by the IRIG B hardware Pwr OK Green The AFD2 power has been validated Lock Green Indicates that the internal PLL has locked to the 1PPS signal Testing is invalidated if...

Page 10: ...level shift pulse width coded with BCD CF control functions SBS IRIGB120 1kHz carrier sine wave amplitude modulated with BCD CF control functions SBS Clock 12 5 Mhz GPS System clock Pulse Width 80 ns...

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