REL1.1
Page 77 of 89
iWave Systems Technologies Pvt. Ltd.
Zynq-Ult MPSoC SOM Development Platform Hardware User Guide
Pin
No
Signal Name
Signal Type/
Termination
Description
5
CAN1_TX(PS_MIO40_501)
O, 1.8V LVCMOS
CAN1 Transmit data. Same pin can be configured
as General Purpose Input/Output if required.
This Pin is connected to 213
rd
pin of Board to Board
Connector1 (J10).
6
PS_I2C0_SCL
IO, 1.8V OD/
4.7K PU
I2C0 Clock.
This Pin is connected to 48
th
pin of Board to Board
Connector2 (J11).
7
SPI0_SS2(PS_MIO1_500)
O, 1.8V LVCMOS
SPI Chip select 2. Same pin can be configured as
General Purpose Input/Output if required.
This Pin is connected to 178
rd
pin of Board to Board
Connector1 (J10).
8
PS_UART1_TX
O, 1.8V LVCMOS
UART1 Transmit data line. Same pin can be
configured as General Purpose Input/Output if
required.
This Pin is connected to 50
th
pin of Board to Board
Connector2 (J11).
9
NC
NA
NC.
10
PS_UART1_RX
I, 1.8V LVCMOS
UART1 Receive data line. Same pin can be
configured as General Purpose Input/Output if
required.
This Pin is connected to 52
nd
pin of Board to Board
Connector2 (J11).
11
GND
Power
Ground
12
GND
Power
Ground
13
PS_SPI0_CLK
O, 1.8V LVCMOS
SPI Clock output. Same pin can be configured as
General Purpose Input/Output if required.
This Pin is connected to 61
st
pin of Board to Board
Connector2 (J11).
14
NC
NA
NC.
15
PS_SPI0_SS0
O, 1.8V LVCMOS
SPI Chip select 0.
This Pin is connected to 63
rd
pin of Board to Board
Connector2 (J11).
16
NC
NA
NC.
17
PS_SPI0_MOSI
IO, 1.8V LVCMOS
SPI Master output Slave input. Same pin can be
configured as General Purpose Input/Output if
required.
This Pin is connected to 65
th
pin of Board to Board
Connector2 (J11).
18
PS_SPI0_MISO
IO, 1.8V LVCMOS
SPI Master input Slave output. Same pin can be
configured as General Purpose Input/Output if
required.
This Pin is connected to 67
th
pin of Board to Board
Connector2 (J11).
19
GND
Power
Ground
20
GND
Power
Ground