REL1.0
Page 46 of 80
Zynq Ult MPSoC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 8: Board to Board Connector2 Pinout
Signal
B2B-2 Pin
B2B-2 Pin
Signal
VCC_5V
1
2
VCC_5V
VCC_5V
3
4
VCC_5V
VCC_5V
5
6
VCC_5V
VCC_5V
7
8
VCC_5V
VCC_5V
9
10
VCC_5V
VCC_5V
11
12
VCC_5V
VCC_5V
13
14
VCC_5V
VCC_5V
15
16
VCC_5V
VCC_5V
17
18
VCC_5V
VCC_5V
19
20
VCC_5V
GND
21
22
GND
GND
23
24
GND
NC
25
26
USB_OTG_DM
PS_JTAG_TDI
27
28
USB_OTG_DP
PS_JTAG_TMS
29
30
GND
PS_JTAG_TCK
31
32
USB_PWR_EN
PS_JTAG_TDO
33
34
USB_OTG_ID
RESET_SW_IN
35
36
VBUS_USB
GND
37
38
I2C1_SDA(PS_MIO25_500)
GPHY_DTXRXM
39
40
SD1_WP(PS_MIO44_501)
GPHY_DTXRXP
41
42
SD1_CD(PS_MIO45_501)
GND
43
44
SD1_PWR(PS_MIO43_501)
GPHY_CTXRXM
45
46
I2C0_SDA(PS_MIO11_500)
GPHY_CTXRXP
47
48
I2C0_SCL(PS_MIO10_500)
GND
49
50
UART1_TX(PS_MIO08_500)
GPHY_BTXRXM
51
52
UART1_RX(PS_MIO09_500)
GPHY_BTXRXP
53
54
UART0_TX(PS_MIO07_500)
GND
55
56
UART0_RX(PS_MIO06_500)
GPHY_ATXRXM
57
58
GPHY_LINK_LED2
GPHY_ATXRXP
59
60
GPHY_ACTIVITY_LED1
Key
Key
SPI0_SCLK(PS_MIO0_500)
61
62
SD1_DATA3(PS_MIO49_501)
SPI0_SS0(PS_MIO3_500)
63
64
SD1_DATA2(PS_MIO48_501)
SPI0_MOSI(PS_MIO5_500)
65
66
SD1_DATA1(PS_MIO47_501)
SPI0_MISO(PS_MIO4_500)
67
68
VRTC_3V0
SD1_DATA0(PS_MIO46_501)
69
70
I2C1_SCL(PS_MIO24_500)
SD1_CMD(PS_MIO50_501)
71
72
SD1_CLK(PS_MIO51_501)
GND
73
74
GND
PL_AE1_LVDS66_L20N
75
76
PL_AA2_LVDS66_L24P
PL_AD1_LVDS66_L20P
77
78
PL_AA1_LVDS66_L24N
PL_AA5_LVDS66_L18N
79
80
PL_AC1_LVDS66_L23N
