background image

Fig. 3 - Memory configuration switching sequence

The diode 

D02

 makes sure the microprocessor exits the reset state a few 

miliseconds   before   the  

NPOR

  signal   turns   off.   During   this   time   the 

microprocessor executes the first instructions where bit 7 of the  

R

  register is 

set to “1”, which makes sure the flip-flop 

U36/5

 is maintained at “1” after 

NPOR 

turns off. This is the temporary startup configuration, where the memory map 
allows the microprocessor to access the 

BOOT

 

EPROM

 

U89

, the 16k 

BASIC

 

EPROM

the video memory and the 16k  

DRAM

  (

BANK #0

). In this startup configuration, 

the  

RESET

  button is not to be used, because the contents of the  

R

  register 

would be erased, which leads to a random memory configuration. The user can 
choose the configuration wanted by pressing one of the following keys:

— B for BASIC interpreter resident in EPROM;
— C for BASIC or other operating system resident on magnetic tape;
— W to check the contact between the EPROM memories and their

sockets. The contents of EPROMs are verified byte by byte against
the recording on the magnetic tape. In case of error, the defective
EPROM chip is indicated by flashing the corresponding color in the
test image (

0-7

);

— D to load the operating system from floppy disk.

After selecting the source of the operating system to be loaded from the 

keyboard, the 

RAM

 area between 

8000H

 and 

FFFFH

 is set up accordingly, bit 6 of 

the   output   port  

FEH

  is   set   to  

0

  or   1   according   to   the   configuration   chosen 

(

BASIC

 or 

CP/M

 respectively) and bit 7 of the R register is brought back to “

0

”. 

The  memory  configuration  will  change  after  the  microprocessor  fetched  the 
code for the 

JP (HL)

 instruction from the old configuration.

The map of the memory in these 3 configurations is shown in Fig. 4.

10

Summary of Contents for CoBra

Page 1: ...HARDWARE AND SOFTWARE SCIENTIFIC RESEARCH AND TECHNOLOGICAL ENGINEERING INSTITUTE HARDWARE DEPARTMENT COBRA HARDWARE DESCRIPTION BRAŞOV 1988 1 ...

Page 2: ...A microcomputer was designed and built by the following team eng Vasile Prodan eng Sorin Finichiu eng Bernd Hansgeorg Wagner math Marcel Arefia math Mircea Pop eng Mircea Ungur arch Alexandru Antal This material has been edited by eng Vasile Prodan eng Mircea Ungur Coordinator Dr Eng Gheorghe Toacşe 2 ...

Page 3: ...rd 19 4 Power supply 22 5 Parts list floppy disk interface 26 6 Parts list CoBra microcomputer 27 7 Parts list keyboard 32 8 Parts list power supply 33 Connectors pin description 35 9 Appendix 1 Schematics CoBra microcomputer 39 10 Appendix 2 Schematics Floppy disk interface 55 11 Appendix 3 Component placement on circuit boards 59 12 Appendix 4 RGB interface for the 002 color monitor 65 3 ...

Page 4: ...k with the Z80A μP and address control bus amplifiers separators the memory block consisting of a configuration selection circuit a 48 KB DRAM circuit and a 2 16 KB EPROM circuit the video controller consisting of 16 KB DRAM video memory memory access priority controller memory access prioritizer generators for video synchronization signals and composite color signals video memory control signals ...

Page 5: ...ory and the I O interface circuits Z80A falls within the 8 bit microprocessor category having the capability to process 8 bits of information simultaneously on its data bus The 16 bit address bus is used to address the memory or the I O devices during the information exchanges Having 16 bits for the address bus Z80A can address 64 KB of memory and an additional 64 KB space dedicated to the I O dev...

Page 6: ... indicates that the lower half of the address bus holds a valid I O address for an I O read or write operation together with M1 indicates that an interrupt response vector can be placed on the data bus RD read three state output active in 0 logic level indicates that the CPU wants to read data from memory or an I O device WR write three state output active in 0 logic level indicates that the CPU d...

Page 7: ...e flip flop clears the PC and registers I and R and sets the interrupt status to Mode 0 During reset time the address and data bus go to a high impedance state and all control output signals go to the inactive state dynamic memory refresh signals are not generated Note that RESET must be active for a minimum of three full clock cycles before the reset operation is complete BUSRQ bus request input ...

Page 8: ...work with editor assembler disassembler copier ex OPUS any other user designed interpreter ex FORTH CP M compatible floppy disk operating system Spectrum type operating system can be loaded from 16 KB EPROM memories from magnetic tape or disk The CP M operating system can only be loaded from disk its operation involving the existence of the floppy disk On one hand the Sinclair Spectrum compatibili...

Page 9: ...al A change of bit 7 of the R register by the instruction LD R A is shown on the address bus BA7 only after the next instruction code was already fetched This instruction can be a single byte jump instruction such as RST n or JP HL which can achieve the jump of the program counter to any address within the 64 KB memory space The memory configuration switching sequence LD R A JP HL is detailed in F...

Page 10: ...one of the following keys B for BASIC interpreter resident in EPROM C for BASIC or other operating system resident on magnetic tape W to check the contact between the EPROM memories and their sockets The contents of EPROMs are verified byte by byte against the recording on the magnetic tape In case of error the defective EPROM chip is indicated by flashing the corresponding color in the test image...

Page 11: ...e R register 1 4 THE VIDEO CONTROLLER The video image is organized in memory as follows a 6kB area called serial video information area which specifies the type of every pixel of the screen as follows if the corresponding bit is 0 then the pixel will have the color of paper and if the bit is 1 then the pixel will have the color of ink for that particular character The address of this 6kB area is 4...

Page 12: ...cur one at a time so at any given moment only one output changes its state Through a simple decoding using gates more signals are generated control signals for DRAM 16k BANK 1 control signals for the serialization registers the color attributes and the strobe for the data separation and storage register The timing of these signals and also the dual access to the video memory are both shown in Fig ...

Page 13: ... image contains 32 characters 5 bit encoded C4 C3 C2 C1 C0 vertically 8 sequential TV lines 3 bit encoded L2 L1 L0 make up one character 8 character rows 3 bit encoded R2 R1 R0 make up one third of the image the image contains 3 thirds 2 bit encoded T1 T0 the 11 combination not being used The address of the byte containing bit B of character C line L row R and third T can be found using formula 1 ...

Page 14: ...d on the CLK diagram of the CPU clock signal in Fig 6 having beside them the number of wait states inserted by the memory access prioritizer in each case The activation of the video memory access signal VMA leads to activating the RAS CAS WE signals in case of reading the byte requested is sampled and stored in the separation and storage register i8212 U76 the moment marked as 1 in Fig 6 On the po...

Page 15: ...ne except the 192 ones that are visible The diode gates that synthesize the BD6N signal along with R73 achieve the BRIGHT function at the same time suppressing it for color black Circuits U12 and U13 and gates U16 U14 make up a divider by 56 The outputs of this divider are being used as character address for the video controller and are the basis for horizontal sync and retrace signals The associa...

Page 16: ...C output port address 254 FEH control port address 223 DFH value 146 92H Bytes 0 5 of port A are used for reading the columns from the keyboard matrix Bit A6 is used for reading data from the external memory on magnetic tape The audio signal from tape is limited by R98 D10 D9 and formatted by U92 op amp Bit A7 is used as serial input protected by R94 and D05 It can be used as RS 232 serial input w...

Page 17: ...els circuit Z80 CTC U01 This circuit has four counters of which counters 0 to 2 are cascaded By programming channel 0 CTC generates one interrupt for each byte to be transferred between i8272 and microprocessor channels 1 and 2 cascaded generate an interrupt at the end of the sector also generating the Terminate Count TC signal for i8272 In this hardware configuration i8272 can be programmed to wo...

Page 18: ... U15 U14 6 U14 8 and counter U08 generate the write clock signal WCK and clock signal CK depending on the selected simple or double MFM density Circuits U13 U07 U14 12 U09 make up a phase locked loop circuit digital PLL that is used to synthesize the data window RDW signal Read Data Window starting from the transitions of data received from the selected floppy drive If input U07 13 is in 1 logic l...

Page 19: ... signal data window is generated from the clock signal CK through a division by 32 with a compensation of the shift occuring between RDW and the data read from the floppy disk 3 KEYBOARD The keyboard consists of 58 keys of which 48 are organized as an 8x6 matrix and the other 10 are used for generating some commands that on a standard ZX SPECTRUM are generated by simultaneously pressing CAPS SHIFT...

Page 20: ...Fig 10 Keyboard schematic 20 ...

Page 21: ...Fig 11 Keyboard schematic 21 ...

Page 22: ...ircuit RD CD The contact representing the P key does not yet get activated due to the presence of the integrating circuit R411 CI Shortly after the deactivation of the contacts representing the CAPS SHIFT and SYMBOL SHIFT keys the contact representing the P key is activated too 4 POWER SOURCE The power source of the CoBra computer can generate 3 different voltages 5V for a load of max 3A 5V for a ...

Page 23: ...Fig 13 Power source schematic 23 ...

Page 24: ...t with R2 Z3 Z4 and the filter capacitor C7 On output pin 6 of IC1 a rectangular signal is generated with a frequency f 20kHz and a duty cycle close to 1 2 The 12V voltage stabilizer is an emitter follower transistor regulator It is built with R1 B T1 Z1 and the filter capacitor C6 Restrictions and protections To avoid damaging the RAM memory it is necessary that the first voltage applied to the m...

Page 25: ...arming is done by turning the main switch off and then on The protection on the 5V source works as follows a shortcircuit on the 5V output causes Z2 to block T2 T3 get saturated and through T2 R3 R4 the potential on pin 7 of IC1 is close to 0V blocking the oscillator built with IC1 It is obvious that this state is maintained until the source is rearmed All the three stabilizers are blocked until t...

Page 26: ...ready to be used WARNING Do not insert and do not pull out the power connector j9 while the power source is on the memory chips with three voltages 4116 might get destroyed 5 COMPONENT LIST FLOPPY DISK INTERFACE CODE TYPE u01 Z80A CTC u02 i8272A u03 74 LS 14 7404 u04 74 LS 153 u05 74156 74155 u06 7438 7403 u07 74S174 u09 74 LS 74 u10 74 LS 08 sw dip switch u12 74 LS 153 u13 74 S 188 u14 74 LS 10 u...

Page 27: ...V c03 1µ 35V c04 100n 50V c05 220p 30V c06 220p 30V jex 201 607 RC jfdd 201 243 RC pcb CX FDC PCB rel 2 0 921442432 6 COMPONENT LIST COBRA MICROCOMPUTER CODE TYPE PCS u01 2716 2732 8 4 u18 u23 u42 u59 u75 u84 u91 u02 74 LS 74 4 u15 u36 u61 u03 74 LS 153 4 u20 u22 u39 u 04 11 4116 4516 32 u 24 31 u 43 50 u 62 69 27 ...

Page 28: ...74 LS 00 6 u17 u37 u54 u87 u55 u19 74 LS 08 2 u38 u21 74 LS 51 1 u34 74 LS 20 1 u35 74 LS 86 2 u88 u41 74157 2 u58 u51 74 LS 157 3 u80 u85 u53 74 LS 04 2 u57 u56 74 LS 42 2 u70 u60 74 LS 95 6 u 77 78 u 81 83 u 71 74 74 LS 07 5 u86 u76 i8212 1 u79 i8255 1 28 ...

Page 29: ...2N2222 1 t2 BC251 1 p 01 04 1N4148 16 p 06 07 p 09 18 p05 DZ4V7 2 p08 1s phone speaker 1 j1 300 066 1 j2 300 064 1 300 060 j3 303 608A 3 j4 j9 j5 201 577 1 j6 300 062 1 j7 201 561 1 j8 201 161 RC 1 201 146 RC 1 jex 201 619 RC 1 k1 EA 5993 1 sb SWITCH 1 ss DIP SWITCH 1 29 ...

Page 30: ...0 R 32 33 R 36 37 R 39 41 R06 1K 12 R20 R22 R23 R26 R27 R31 R34 R42 R73 R94 R96 R 99 106 8K2 8 R09 2K2 4 R84 R87 R107 R 10 17 4K7 16 R69 R85 R 108 113 R35 680 2 R38 R43 1 4K7 1 R44 330 390 1 R 45 47 620 21 R 49 66 R48 150 0 5W 2 R92 R70 330 0 5W 1 30 ...

Page 31: ... 1 R86 220 0 5W 1 R93 75 0 5W 1 Rw 4K7 1 c 01 05 100n 30V 34 c 07 13 c 16 23 c 25 29 c 31 32 c 37 39 c41 c 46 48 c14 150pF 4 ccS cAT cHB c15 10µ 10V 2 c45 c24 220pF 1 c30 15pF 1 c 33 35 1 10µ 35V 4 c40 c36 270pF 1 c42 100 220µ 6V 1 c43 100 330µ 6V 1 c44 150 330µ 10V 1 cXR 390pF 2 ccc pcb 921442431 1 31 ...

Page 32: ...209 d 301 302 d501 d512 cd 10µ 35V 2 ci r201 4K7 0 125W 3 r411 ri rd 10K 0 125W 1 rpu 1K5 0 125W 1 jkb 201 606 1 369 108 151 116 369 108 152 58 369 108 154 58 369 108 155 58 369 108 169 2 369 108 170 1 k 100 101 369 108 153y 11 k 103 104 k200 k209 k211 k 300 302 k313 k102 369 108 159x 1 k201 369 108 158x 2 k210 32 ...

Page 33: ... POWER SOURCE CODE TYPE CI1 ßE 555 CI2 ßE 555 CI3 ROB 317 TO 39 T1 BD 237 T2 T3 BC 171 T4 BUR 608 T5 BD 138 T6 BD 251 PR1 3PM05 D1 1N4001 D2 6DRR1P D3 D4 1N4148 D5 6DRR1P D6 LED ROL 02 Z1 PL 13Z Z2 PL 4V7Z Z3 Z4 PL 6V8Z Z5 PL 5V1Z Z6 DZ 3V3 Z7 PL 5V6Z C1 C2 C3 C4 3n3 CLX 12 15 C5 4700µF 40Vcc EG 76 91 C6 1000µF 16Vcc EG 61 44 C7 10µF 25Vcc EG 52 53 C8 1nF CLY 12 06 C9 10nF CLX 12 15 C10 C11 C12 10...

Page 34: ...RBC 1002 R13 1K RCG 10 50 R14 R15 2K2 RCG 10 50 R16 220 RCG 10 50 R17 270 RCG 10 50 S1 250 P32824 S2 2K5 P32824 Other materials TR 220V 19V S 8 cm2 N2 96 turns 0 95mm enamelled copper 19AWG N1 1067 turns 0 2mm enamelled copper 32AWG DIN 5 pin connector 303608 B auto light bulb 24V 2W Fuse socket for PCB mount L1 600µH 1 2mm enamelled copper 17AWG on 34x28mm ferrite pot core Ex AL 570nH turn n 33 t...

Page 35: ...ynchronization signal j2 RS 232 connector 2 TxD 3 RxD 7 GND j3 auxiliary connector 1 4 AA speaker out 2 GND ground 3 5 ATR formatted audio signal j4 tape recorder connector 1 4 ATO output to tape recorder 2 GND ground 3 5 ATI input from tape recorder j5 8 bit input port connector address 0DFH 1a 8a GND ground 9a 10a Vcc 5V 1b PB0 2b PB1 3b PB2 4b PB3 5b PB4 6b PB5 7b PB6 8b PB7 9b K5 bit 5 port 0F...

Page 36: ...the original manual maintained above 4 The original manual only had 9 pins listed for the Joystick connector The original PCB layout though had 10 holes drilled for this connector and pin 10 was even connected to JSC as mentioned above at 3 I changed the original manual adding pin 10 to the list even though it is now not connected j7 keyboard connector 1a NC 2a Vcc 5V 3a DIF phone speaker out 4a K...

Page 37: ... 10 BA3 BA10 11 BA2 NPO 12 BA1 D7 13 BA0 D6 14 D0 D5 15 D1 D4 16 D2 D3 17 BA12 BA13 18 19 20 06 05 21 IEI 22 IEO 23 NIOWR NIORD 24 BNRD BNIORQ 25 BNWR BNMREQ 26 BNRFSH BNM1 27 NHALT NWAIT 28 NBUSACK NNMI 29 NRST NBUSRQ 30 POR NINT 31 GND GND 32 BCLK BCLK BCLK j9 power connector 1 VDD 12V 2 GND ground 3 VCC 5V 4 VBB 5V 5 GND ground 37 ...

Page 38: ...9 SI TRG3 NIOWR 10 BA4 BNIORQ 11 BA3 IEO 12 NRST NINT 13 BA2 IEI 14 BCLK BNM1 15 GND GND jFDD floppy disk drive connector 1a NSS 2 20a GND 1b NUSD 2b NTR00 3b NWP 4b NIX 5b NRDY0 6b NRDY1 7b NRDY2 8b NRDY3 9b NS0 10b NS1 11b NS2 12b NS3 13b NHL3 14b NHL2 15b NHL1 16b NHL0 17b NWD 18b NST 19b NDIR 20b NWG 38 ...

Page 39: ...9 APPENDIX 1 CoBra Microcomputer Schematics 39 ...

Page 40: ...Fig A1 1 CoBra Microcomputer Central Processing Unit 40 ...

Page 41: ...Fig A1 2 CoBra Microcomputer Configurator and Selector Circuit 41 ...

Page 42: ...Fig A1 3 CoBra Microcomputer Read Only Memory Circuit 42 ...

Page 43: ...Fig A1 4 CoBra Microcomputer DRAM Memory Circuit 43 ...

Page 44: ...Fig A1 5 CoBra Microcomputer Memory Access Prioritizer and Command Logic 44 ...

Page 45: ...Fig A1 6 CoBra Microcomputer Video Address Generator Circuit 45 ...

Page 46: ...Fig A1 7 CoBra Microcomputer Video Address Multiplexer Circuit 46 ...

Page 47: ...Fig A1 8 CoBra Microcomputer Video Memory Circuit 47 ...

Page 48: ...Fig A1 9 CoBra Microcomputer Video Sync Pulses Generator Circuit 48 ...

Page 49: ...Fig A1 10 CoBra Microcomputer Video Signal Shape Generator 49 ...

Page 50: ...Fig A1 11 CoBra Microcomputer Interfaces 50 ...

Page 51: ...Fig A1 12 CoBra Microcomputer Voltage Level Adapter Circuits 51 ...

Page 52: ...Fig A1 13 CoBra Microcomputer Keyboard Interfacing Circuit 52 ...

Page 53: ...Fig A1 14 CoBra Microcomputer TV Monitor Interfacing Circuit 53 ...

Page 54: ...Fig A1 15 CoBra Microcomputer with Extended RAM Memory 16 64KB Changes to the Memory Configurator and Selector Circuit 54 ...

Page 55: ...10 APPENDIX 2 Flopppy Disk Interface Schematics 55 ...

Page 56: ...Fig A2 1 Floppy Disk Interface Disk Controller 56 ...

Page 57: ...Fig A2 2 Floppy Disk Interface Command and Control Signals Generator Circuits 57 ...

Page 58: ...Fig A2 3 Floppy Disk Interface Write Clock and Digital PLL Circuits 58 ...

Page 59: ...10 APPENDIX 3 Component Placement on Boards 59 ...

Page 60: ...60 Fig A3 1 Component Placement on Keyboard Circuit Board ...

Page 61: ...61 Fig A3 3 Keyboard Circuit Board top layer seen from above keys side ...

Page 62: ...62 Fig A3 3 Keyboard Circuit Board bottom layer seen from above keys side ...

Page 63: ...Fig A3 5 Component placement on the floppy interface board 63 ...

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