Fig. 3 - Memory configuration switching sequence
The diode
D02
makes sure the microprocessor exits the reset state a few
miliseconds before the
NPOR
signal turns off. During this time the
microprocessor executes the first instructions where bit 7 of the
R
register is
set to “1”, which makes sure the flip-flop
U36/5
is maintained at “1” after
NPOR
turns off. This is the temporary startup configuration, where the memory map
allows the microprocessor to access the
BOOT
EPROM
U89
, the 16k
BASIC
EPROM
,
the video memory and the 16k
DRAM
(
BANK #0
). In this startup configuration,
the
RESET
button is not to be used, because the contents of the
R
register
would be erased, which leads to a random memory configuration. The user can
choose the configuration wanted by pressing one of the following keys:
— B for BASIC interpreter resident in EPROM;
— C for BASIC or other operating system resident on magnetic tape;
— W to check the contact between the EPROM memories and their
sockets. The contents of EPROMs are verified byte by byte against
the recording on the magnetic tape. In case of error, the defective
EPROM chip is indicated by flashing the corresponding color in the
test image (
0-7
);
— D to load the operating system from floppy disk.
After selecting the source of the operating system to be loaded from the
keyboard, the
RAM
area between
8000H
and
FFFFH
is set up accordingly, bit 6 of
the output port
FEH
is set to
0
or 1 according to the configuration chosen
(
BASIC
or
CP/M
respectively) and bit 7 of the R register is brought back to “
0
”.
The memory configuration will change after the microprocessor fetched the
code for the
JP (HL)
instruction from the old configuration.
The map of the memory in these 3 configurations is shown in Fig. 4.
10
Summary of Contents for CoBra
Page 20: ...Fig 10 Keyboard schematic 20 ...
Page 21: ...Fig 11 Keyboard schematic 21 ...
Page 23: ...Fig 13 Power source schematic 23 ...
Page 39: ...9 APPENDIX 1 CoBra Microcomputer Schematics 39 ...
Page 40: ...Fig A1 1 CoBra Microcomputer Central Processing Unit 40 ...
Page 41: ...Fig A1 2 CoBra Microcomputer Configurator and Selector Circuit 41 ...
Page 42: ...Fig A1 3 CoBra Microcomputer Read Only Memory Circuit 42 ...
Page 43: ...Fig A1 4 CoBra Microcomputer DRAM Memory Circuit 43 ...
Page 44: ...Fig A1 5 CoBra Microcomputer Memory Access Prioritizer and Command Logic 44 ...
Page 45: ...Fig A1 6 CoBra Microcomputer Video Address Generator Circuit 45 ...
Page 46: ...Fig A1 7 CoBra Microcomputer Video Address Multiplexer Circuit 46 ...
Page 47: ...Fig A1 8 CoBra Microcomputer Video Memory Circuit 47 ...
Page 48: ...Fig A1 9 CoBra Microcomputer Video Sync Pulses Generator Circuit 48 ...
Page 49: ...Fig A1 10 CoBra Microcomputer Video Signal Shape Generator 49 ...
Page 50: ...Fig A1 11 CoBra Microcomputer Interfaces 50 ...
Page 51: ...Fig A1 12 CoBra Microcomputer Voltage Level Adapter Circuits 51 ...
Page 52: ...Fig A1 13 CoBra Microcomputer Keyboard Interfacing Circuit 52 ...
Page 53: ...Fig A1 14 CoBra Microcomputer TV Monitor Interfacing Circuit 53 ...
Page 55: ...10 APPENDIX 2 Flopppy Disk Interface Schematics 55 ...
Page 56: ...Fig A2 1 Floppy Disk Interface Disk Controller 56 ...
Page 57: ...Fig A2 2 Floppy Disk Interface Command and Control Signals Generator Circuits 57 ...
Page 58: ...Fig A2 3 Floppy Disk Interface Write Clock and Digital PLL Circuits 58 ...
Page 59: ...10 APPENDIX 3 Component Placement on Boards 59 ...
Page 60: ...60 Fig A3 1 Component Placement on Keyboard Circuit Board ...
Page 61: ...61 Fig A3 3 Keyboard Circuit Board top layer seen from above keys side ...
Page 62: ...62 Fig A3 3 Keyboard Circuit Board bottom layer seen from above keys side ...
Page 63: ...Fig A3 5 Component placement on the floppy interface board 63 ...