Multiplexers
U41
and
U58
take care of changing the row and column
address for the 48k
DRAM
memory (
U62-69
,
U43-U50
,
U24-U31
). In order to
increase speed of operation in
CP/M
, half of the video
DRAM
(
BANK #1
) is
replaced by half of
DRAM
BANK
#0
, otherwise the execution of
BDOS
calls would
be slowed down by wait states from the memory access prioritizer. This
memory replacement is achieved by the gates at
U52/12
,
U52/8
,
U35/3
.
Under the
BASIC
configuration,
U54/11
synthesizes the Read Only signal
for
DRAM BANK #0
, the gate
U17/11
allows access for
SPECTRUM
-specific 20ms
interrupts, and the asyncronous input
U36/1
locks the state of memory
configuration flip-flops regardless of any change in bit 7 of the
R
register.
1.4 THE VIDEO CONTROLLER
The video image is organized in memory as follows:
— a 6kB area, called “serial video information area”, which specifies the
type of every pixel of the screen, as follows:
if the corresponding bit is
0
then the pixel will have the color of
“paper”, and if the bit is 1 then the pixel will have the color of
“ink” for that particular character. The address of this 6kB area
is
4000H
for
BASIC
configuration and
C000H
for the other two
configurations;
— a 768 bytes area, called “color attribute area”, which specifies the
color of “ink” and the color of “paper”, for each character, specifies if
that character should be flashing and if it should have increased
brightness. The address of this area is
5800H
for
BASIC
configuration
and
D800H
for the other two configurations.
The block diagram of the video controller is shown in
Fig.5
.
11
Fig. 4 - Memory map for the
three configurations
Summary of Contents for CoBra
Page 20: ...Fig 10 Keyboard schematic 20 ...
Page 21: ...Fig 11 Keyboard schematic 21 ...
Page 23: ...Fig 13 Power source schematic 23 ...
Page 39: ...9 APPENDIX 1 CoBra Microcomputer Schematics 39 ...
Page 40: ...Fig A1 1 CoBra Microcomputer Central Processing Unit 40 ...
Page 41: ...Fig A1 2 CoBra Microcomputer Configurator and Selector Circuit 41 ...
Page 42: ...Fig A1 3 CoBra Microcomputer Read Only Memory Circuit 42 ...
Page 43: ...Fig A1 4 CoBra Microcomputer DRAM Memory Circuit 43 ...
Page 44: ...Fig A1 5 CoBra Microcomputer Memory Access Prioritizer and Command Logic 44 ...
Page 45: ...Fig A1 6 CoBra Microcomputer Video Address Generator Circuit 45 ...
Page 46: ...Fig A1 7 CoBra Microcomputer Video Address Multiplexer Circuit 46 ...
Page 47: ...Fig A1 8 CoBra Microcomputer Video Memory Circuit 47 ...
Page 48: ...Fig A1 9 CoBra Microcomputer Video Sync Pulses Generator Circuit 48 ...
Page 49: ...Fig A1 10 CoBra Microcomputer Video Signal Shape Generator 49 ...
Page 50: ...Fig A1 11 CoBra Microcomputer Interfaces 50 ...
Page 51: ...Fig A1 12 CoBra Microcomputer Voltage Level Adapter Circuits 51 ...
Page 52: ...Fig A1 13 CoBra Microcomputer Keyboard Interfacing Circuit 52 ...
Page 53: ...Fig A1 14 CoBra Microcomputer TV Monitor Interfacing Circuit 53 ...
Page 55: ...10 APPENDIX 2 Flopppy Disk Interface Schematics 55 ...
Page 56: ...Fig A2 1 Floppy Disk Interface Disk Controller 56 ...
Page 57: ...Fig A2 2 Floppy Disk Interface Command and Control Signals Generator Circuits 57 ...
Page 58: ...Fig A2 3 Floppy Disk Interface Write Clock and Digital PLL Circuits 58 ...
Page 59: ...10 APPENDIX 3 Component Placement on Boards 59 ...
Page 60: ...60 Fig A3 1 Component Placement on Keyboard Circuit Board ...
Page 61: ...61 Fig A3 3 Keyboard Circuit Board top layer seen from above keys side ...
Page 62: ...62 Fig A3 3 Keyboard Circuit Board bottom layer seen from above keys side ...
Page 63: ...Fig A3 5 Component placement on the floppy interface board 63 ...
