Notes:
•
During operation the values for V
set
are adjusted. If a channel is switched off the adjusted set value will be kept, not the
original value set by the user.
•
If the VCT-coefficient if modified during operation, V
ref
and T
ref
are reset to the present values to prevent a sudden
voltage change.
•
If the temperature sensor is dis- and reconnected during operation, V
ref
and T
ref
are reset to the present values to
prevent a sudden voltage change.
•
The temperature dependent voltage correction can be deactivated by setting the VCT-coefficient to 0 or by
disconnecting the temperature sensor. If this is done during operation, the channel will keep the actual voltage set.
•
If the temperature sensor is disconnected a temperature of -273.15°C is shown for that channel.
•
The VCT data points are described in the manual "
iseg Hardware Abstraction Layer
"
(see appendix)
.
4.2 Single Channel Inhibit
INFORMATION
INFORMATION
INHIBIT is an external signal, that switches off the high voltage for the device or a specific channel
If none of the options
IHB
,
IHD
or
VCT
is ordered, modules are equipped with an
INHIBIT
for each channel via a Sub-D
connector on the backplane of the module. Channel 0 to 3 corresponds to Pin 1 to 4 at the Sub-D connector, Pins 5-9 are
connected to GND.
With option
IHB
the module is equipped with BNC connectors for the
INHIBIT
of each channel instead.
The
INHIBIT
signal are TTL-level, the signal logic and default states can be configured. The following settings are possible:
Case 1 – IU
INHIBIT
signal logic:
LOW-active (LOW HV-generation stopped)
→
default state:
HIGH (internal pull-up resistor applied)
open
INHIBIT
signal input:
HV enabled
Case 2 – ID
INHIBIT
signal logic:
LOW-active (LOW HV-generation stopped)
→
default state:
LOW (internal pull-down resistor applied)
open
INHIBIT
signal input:
HV disabled
Case 3 – NIU
INHIBIT
signal logic:
HIGH-active (HIGH HV-generation stopped)
→
default state:
HIGH (internal pull-up resistor applied)
open
INHIBIT
signal input:
HV disabled
Case 4 – NID
INHIBIT
signal logic:
HIGH-active (HIGH HV-generation stopped)
→
default state:
LOW (internal pull-down resistor applied)
open
INHIBIT
signal input:
HV enabled
SHR – Desktop High Voltage Power Supply | Last changed on: 19.01.2018 |
www.iseg-hv.com
8/11
