IGEP
TM
SMARC iMX6
Hardware Reference Manual
ISEE 2007 S.L. All rights reserved, IGEP is a registered trademark from ISEE 2007 S.L. The following is provided for informational purposes only.
NIF:ESB64377005 Document:
MAN-IGEP0046-001
/ Revision:
1.3
/ Date:
23/06/2016
28
4.12
I2S: SERIAL AUDIO PORT
I2S is a synchronous serial bus used for interfacing digital audio devices such as Audio CODECs and DSP chips. Generally
PCM audio data is transmitted over the I2S interface. The I2S bus may have a single bidirectional data line or two
separate data lines. The signals constituting the I2S bus are a serial clock/ bit clock (output from the master), a left right
clock (output from the master) that indicates the channel being transmitted and a single bidirectional data line or two
data lines - one input and one output. A SMARC module can generally be configured as I2S master or slave.
In the next example is connected a Stereo CODEC with Headphone AMP to the Serial Audio Port (page 56 of
SMARC Design Guide V_IO=1V8).
Figure 21 I2S example: Stereo CODEC with Headphone AMP
Pin
Volt
Level
Dev
Pin
Main Function
Main
MUX
Type
Fixed
Function
Comments
S38
1V8
P4
AUDIO_MCK
3
OUT
NO
Master clock output to Audio codecs (CCM_CLKO1)
S39
1V8
V24
I2S0_LRCK
3
IO
NO
AUD4 Transmit Frame Sync signal
S40
1V8
T20
I2S0_SDOUT
3
OUT
NO
AUD4 Data Transmit signal
S41
1V8
W24
I2S0_SDIN
3
IN
NO
AUD4 Data Receive signal
S42
1V8
U22
I2S0_CK
3
IO
NO
AUD4 Transmit Clock signal
Table 16 I2S pins
