background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

CYPRESS USB mP

To Xilinx FPGA

To Xilinx FPGA

USB Device IDs

Default Mode

EEPROM

To X98001 2wire
Interface

To ISL59443IL

To ISL59443IL

To Xilinx FPGA for
Configuration RAM

Status LED

Status LED

ISL98001LC

1.0

ISL98001 Evaluation Board

B

7

7

Tuesday, March 29, 2005

Title

Size

Document Number

Rev

Date:

Sheet

of

DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7

DATA[0..7]

A

DDR15

A

DDR14

A

DDR13

A

DDR12

A

DDR10

A

DDR11

A

DDR9

A

DDR7

A

DDR8

A

DDR6

A

DDR4

A

DDR5

A

DDR3

A

DDR1

A

DDR2

A

DDR0

ADDR[0..15]

SCL_MP

SDA_MP

USBD+

USBDN

USBDP

RESET#

3.3V

XIN

XOUT

USBD-

ISL_SDENB#
ISL_SCL
ISL_SDA
CY_PROG

CY_INITB

CY_DONE
CY_BUSY
CY_DIN1

CY_DIN0

CY_CLK

SCL_MP
SDA_MP

SCL_MP
SDA_MP

RxD0
TxD0

RxD0
TxD0

LED4

LED4
LED5
LED6

ISL_SCL

CY_INITB
CY_PROG
ISL_SDA

LED6

LED5

ADDR[0..15]

(5)

SCL

(1)

MP_ODD_EVEN_FIELD (2)

MP_S0 (2)
MP_S1 (2)

MP_P0 (2)
MP_P1 (2)

WR# (5)
RD# (5)

ISL_SDENB# (2)
ISL_SCL (2)

CY_PROG (4,5)
CY_CLK (4,5)
CY_DIN0

(4,5)

CY_INITB (4,5)

CY_DONE (4,5)
CY_BUSY

(5)

CY_DIN1

(5)

DATA[0..7]

(5)

SDA

(1)

ISL_SDA (2)

CY_CLKOUT (5)

SP24 (5)
SP25 (5)
SP26 (5)
SP27 (5)

SP28 (5)

3.3V

3.3V

3.3V

3.3V

3.3V

USB_5V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

R200

10K

C181

22 pF

D6

LED0

C178

0.1uF

R166
24

R185
10K

C177

0.1uF

SW2

SW PUSHBUTTON

R168
24

R181
10K

C176

0.1uF

R171
10M

C175

0.1uF

R172
10K

C174

0.1uF

C183

0.1uF

TP17

1

R53
0 Ohm

C173

0.1uF

R179
10K

C188

0.1uF

JL40

1

2

Y2

12Mhz

R182
10K

CY7C64613

U28

CY7C64613_S128

8
9

10
11
13
14
15
16

4

18

5

6

19

42

43

50

20

69

51

38

98

3

12

21

22

23

105

106

107

108

114

115

116

117

118

120

121

122

127

128

1

2

34

33

41

25
26
27
28
29
30
31
32

79
80
81
82
83
84
85
86

110
111
112
113
123
124
125
126

48

17
36
55

35

37

39

40

47

52

7

65

66

49

53

54

62

67

56
57
58
59
60
61
63
64

88
89
90
91
92
93
94
95

24

101
96
97

100
109

73

74

119

76

77

87

99

70

71

72

78

68
75

102
103
104

44
45
46

D0
D1
D2
D3
D4
D5
D6
D7

VCC

AVCC

SCL

SDA

XIN

NCN42

NCN43

R

SV5

0

XOUT

RESET#

EA

XCLKSEL

XCLK

GND

GND

AG

N

D

R

SV2

2

GND

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A1

0

A1

1

A1

2

A1

3

A1

4

A1

5

CLK

O

UT

PSEN

#

BKPT

PA0/T0OUT
PA1/T1OUT

PA2/OE#
PA3/CS#

PA4/FWR#

PA5/FRD#

PA6/RxD0OUT
PA7/RxD1OUT

PB0/D0/GDA0
PB1/D1/GDA1
PB2/D2/GDA2
PB3/D3/GDA3
PB4/D4/GDA4
PB5/D5/GDA5
PB6/D6/GDA6
PB7/D7/GDA7

PC0/RxD0/RDY0

PC1/TxD0/RDY1

PC2/INT0#

PC3/INT1#/RDY3

PC4/T0/CTL1
PC5/T1/CTL3

PC6/WR#/CTL4

PC7/RD#/CTL5

DISCON#

VCC
VCC
VCC

GND

R

SV3

7

R

SV3

9

GND

GND

GND

WAKEUP#

USBD-

USBD+

R

SV4

9

R

SV5

3

R

SV5

4

GND

GND

PD0/GDB0/BFI0
PD1/GDB1/BFI1
PD2/GDB2/BFI2
PD3/GDB3/BFI3
PD4/GDB4/BFI4
PD5/GDB5/BFI5
PD6/GDB6/BFI6
PD7/GDB7/BFI7

PE0/ADR0
PE1/ADR1
PE2/ADR2
PE3/ADR3
PE4/ADR4

PE5/CTL3
PE6/CTL4
PE7/CTL5

ADR5

CTL0/AINFLAG
CTL1/BINFLAG

CTL2/AOFLAG

VCC
VCC

R

SV7

3

R

SV7

4

GND

R

SV7

6

R

SV7

7

GND

GND

R

SV7

0

R

SV7

1

GND

GND

VCC
VCC

RDY0/ASEL
RDY1/BSEL
RDY2/AOE
RDY3/BOE
RDY4/SLWR
RDY5/SLRD

RP15

4.7K

1
2
3
4

5

6

7

8

R40

1K

R186
10K

R184
10K

JP3

1

2

3

D5

LED0

R187
10K

C182

22 pF

R54
0 Ohm

U33

SMT

1
2
3
4

5

6

7

8

A0
A1
A2
Gnd SDA

SCL

WP

VCC

JP25

1

2

3

R198
10K

C30
0.1uF

USBCON

USB_CONNECTOR

1

2

3

4

5

5V+

D-

D+

GND

SHELL

U5

2 SMT

1
2
3
4

5

6

7

8

A0
A1
A2
Gnd SDA

SCL

WP

VCC

D4

LED0

R39

1K

R169
4.7K

C180

0.1uF

R180
10K

C184

0.1uF

R170
4.7K

C179

0.1uF

R41

1K

R167 1.5K

Summary of Contents for ISL98001

Page 1: ...ration 1001 Murphy Ranch Rd Milpitas CA 95035 Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 1 16 Ver 1 1 12 19 05 Installation and Operation of Intersil s ISL98001 Analog Front End Evaluation System ...

Page 2: ... and ME not currently supported Hardware Requirements USB Port CD ROM drive for install files minimum 10MB free hard disk space Software Installation Launch the ISL98001 Installer exe file on the CD ROM and follow the instructions The default installation will add an Intersil directory to the Start Menu Programs tree That directory will contain a shortcut to the ISL98001 executable and an uninstal...

Page 3: ... Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 3 16 Ver 1 1 12 19 05 By default the installer will put the evaluation software under c Program Files ISL98001 directory To us a different directory select the Browse button Press Next to continue ...

Page 4: ...nch Rd Milpitas CA 95035 Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 4 16 Ver 1 1 12 19 05 Press Next to create the Intersil folder in the Start Menu Press the Install button to copy all the necessary files onto the PC ...

Page 5: ...he provided 5V power supply Connect the USB cable to the ISL98001 Evaluation Board The Microsoft windows operating system will see the ISL98001 Evaluation Board as a new device and will try to load appropriate driver for it Windows XP may pop up this message If you see this box select Yes now and every time I connect a device and click on Next If you elect not to select Yes now and every time I co...

Page 6: ... 95035 Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 6 16 Ver 1 1 12 19 05 The following screen will then appear Press Next Install the software automatically The Hardware Wizard will try to locate and install the driver for the ISL98001 ...

Page 7: ... Ranch Rd Milpitas CA 95035 Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 7 16 Ver 1 1 12 19 05 Click Finish to complete the installation On XP systems a pop up message may display the status of the ISL98001 hardware ...

Page 8: ...y operation is this Connect a monitor with a DVI input to the DVI output connector Connect a 1280x1024 60Hz RGB video source to VGA1 Connect the 5V power supply to the power connector At this point the evaluation board s FPGA will format the data from the ISL98001 and generate SXGA video timing on the DVI output connector The incoming SXGA image should appear on the DVI monitor Additional video mo...

Page 9: ...ault location is Start Programs Intersil ISL98001 After the program has launched you should see the following screen Click on the Read All Registers button in the lower left screen All of the register values from the ISL98001 on the evaluation board should appear as shown in the next image If the register values are not read correctly proceed to the Troubleshooting section of this document ...

Page 10: ...box then quickly type both digits of the desired value If you type too slowly more than 1 second between the first and second digit the first digit typed will become the lower nibble and the higher nibble will be 0 To only change one nibble using the keyboard select the high nibble or the low nibble and type the new hexadecimal value You can also change the register values using the keyboard Incre...

Page 11: ...ion platform does not automatically detect the video mode of the incoming video signal To obtain the correct image on the DVI monitor the software needs to be told the format of the incoming video signal This is done using the Video Mode box which is opened by selecting Select Input Video Mode from the options menu Using the drop down menu select the resolution and refresh rate that matches the re...

Page 12: ...ere is a composite video connection the ISL98001 AFE does not support composite video decoding It will simply digitize the composite video signal through the AFE s video channel It is possible to take that digitized composite signal and perform digital decoding of the composite signal after it is digitized but that is beyond the function of this evaluation system ...

Page 13: ... control The Automatic Black Level Compensation ABLC register 0x17 function can be disabled to compare the image with and without ABLC Please refer to the ISL98001 datasheet for more information on the ISL98001 and its configuration options Notes All registers can be read by pressing the Read All Registers button Registers 0x00 0x02 are read only The HTOTAL value is not latched by the ISL98001 unt...

Page 14: ...CA 95035 Tel 408 432 8888 http www intersil com 2005 Intersil Corp Page 14 16 Ver 1 1 12 19 05 DE Adjust If the image on the DVI monitor is clipped the following window allows the Data Enable DE signal to be adjusted to change the position of the frame ...

Page 15: ...e evaluation board as soon as it is launched If there is a communication problem the following dialog box will be displayed If you see this dialog open the Windows Control Panel Double click on the System icon and select the Hardware tab then click on Device Manager There should be a Jungo entry with an ISL98001 sub category This indicates the driver is properly installed and is communicating with...

Page 16: ...oard and software Note The ISL98001 Evaluation Board has a Vendor ID VID of 0x09AA and Product ID PID of 0x1004 If the USB connection is functioning but no image is displayed on the DVI monitor take the following steps Make sure the input video mode resolution refresh rate matches the Input Video Mode selection in the software Close the software reset the ISL98001 reset the microcontroller and res...

Page 17: ...75 C13 0 01uF VSin2 1 Y1 25 Mhz RP13 33 Ohm 1 2 3 4 5 6 7 8 C9 22pF R156 0 Ohm R5 4 7K C15 0 01uF HSin2 1 RP14 33 Ohm 1 2 3 4 5 6 7 8 JP24 1 2 C10 22pF VS2 1 RP5 33 Ohm 1 2 3 4 5 6 7 8 C17 0 01uF U1 X98001LC 7 12 14 19 13 22 24 26 28 25 33 44 34 45 41 46 55 56 57 58 59 60 61 62 75 74 73 72 71 70 69 68 87 86 85 84 83 81 82 80 90 91 92 93 94 95 96 97 100 101 102 103 104 105 106 107 112 113 114 115 1...

Page 18: ...EXT 1 RGBgnd2 1 R_IN_2 1 5V_VGA2 AVdd_3 3V 5V 5V 5V PB1 1 J10C RCA_COM 3 6 R177 75 J9A RCA_COM 1 2 R174 75 C5 0 1uF PR2 1 R175 75 R9 75 COMPS1 1 R30 20K C6 0 1uF R31 10K R173 75 Y2 1 R15 75 R32 100K U23 EL4511CU 1 2 3 4 5 6 7 8 9 10 11 12 13 15 24 14 16 17 18 20 19 21 22 23 XTAL VBLANK SYNCLOCK PDWN SDENB SCL SDA GNDD1 HIN SYNCIN VERTIN LEVEL GNDA1 VCCA2 XTALN VCCA1 GNDA2 GNDD2 VCCD BACKPORCH SYNC...

Page 19: ...RS_D0 RS_D2 RS_D3 RP_D 7 0 1 5 GP_D 7 0 1 5 GS_D 7 0 1 5 BP_D 7 0 1 5 BS_D 7 0 1 5 DATACLK_S 1 5 DATACLKB_S 1 5 HSOUT_S 1 5 VSOUT_S 1 5 HSYNCOUT_S 1 5 VSYNCOUT_S 1 5 DDC_SDA2 2 DDC_SCL2 2 DDC_SDA1 1 DDC_SCL1 1 RS_D 7 0 1 5 DATACLK_S 1 5 5V_VGA1 5V_VGA2 U4 24LC02 SMT 1 2 3 4 5 6 7 8 A0 A1 A2 Gnd SDA SCL WP VCC U3 24LC02 SMT 1 2 3 4 5 6 7 8 A0 A1 A2 Gnd SDA SCL WP VCC R26 4 7K HDR23 HEADER 8x2 SM 1 ...

Page 20: ...100 C168 0 01uF R48 390 D9 LED C32 10uF 1 2 C65 0 1uF C11 0 1uF TP5 1 C77 0 1uF C35 47uF 1 2 C53 0 1uF C58 0 1uF C79 0 1uF C64 0 1uF C167 22uF 1 2 C166 0 1uF R47 240 R163 330 TP6 1 C73 0 1uF C23 0 1uF C68 0 1uF C75 0 1uF C57 0 1uF R42 0 Ohm C78 0 1uF C55 0 1uF SW3 C63 0 1uF U29 LM1117 1 2 3 4 ADJ Vo2 Vin Vo4 C36 0 1uF R152 1K U32 XCF02S_VO20 1 2 9 12 14 15 16 11 20 19 18 13 10 3 4 5 6 7 8 17 D0 NC...

Page 21: ...RST_DVI_MASTER 6 SP14 7 SP15 7 SP17 7 SP19 7 SP27 7 SP13 7 SP25 7 SP23 7 SP21 7 SP12 7 SP28 7 SP26 7 SP24 7 SP22 7 SP20 7 SP18 7 SP16 7 HSYNCOUT_S 1 3 VSOUT_S 1 3 3 3V 2 5V 3 3V 3 3V 1 2V 3 3V 3 3V R58 0 R194 100 R196 100 U20A XC3S400_PQ208 4 5 7 9 10 11 12 13 15 16 18 19 20 21 22 24 29 31 33 34 35 36 37 39 40 42 43 44 46 45 48 50 57 58 61 62 63 64 65 67 68 71 72 74 76 77 78 79 81 83 85 86 87 90 9...

Page 22: ... DVI_TX0 DVI_TXC DVI_TXC 3 3V 3 3V 3 3V 5V C82 10uF C91 10uF 1 2 C81 0 1uF C86 0 1uF C89 10uF FB1 U11 SiI164 11 10 13 15 14 9 34 35 36 37 38 39 40 41 42 43 44 45 46 47 50 51 52 53 54 55 58 59 60 61 62 63 4 5 2 57 8 7 6 56 19 31 30 28 27 25 24 22 21 23 29 20 26 32 16 17 48 64 18 49 1 12 33 3 MSEN SOUT PD ISEL RST BSEL SCL DSEL SDA EDGE CHG RESERVED GND D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 SYNCO ...

Page 23: ...2 23 105 106 107 108 114 115 116 117 118 120 121 122 127 128 1 2 34 33 41 25 26 27 28 29 30 31 32 79 80 81 82 83 84 85 86 110 111 112 113 123 124 125 126 48 17 36 55 35 37 39 40 47 52 7 65 66 49 53 54 62 67 56 57 58 59 60 61 63 64 88 89 90 91 92 93 94 95 24 101 96 97 100 109 73 74 119 76 77 87 99 70 71 72 78 68 75 102 103 104 44 45 46 D0 D1 D2 D3 D4 D5 D6 D7 VCC AVCC SCL SDA XIN NCN42 NCN43 RSV50 ...

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