Application Note 1946
4
AN1946.0
July 7, 2014
Submit Document Feedback
Connector/Monitor-pin Description
Table 1
shows the jumper/terminal configuration of the ISL78268EVAL1Z.
TABLE 1. ISL78268EV1ZB CONNECTOR/MONITOR-PIN DESCRIPTION
CONNECTOR/
TERMINAL
SIGNAL NAME
DESCRIPTIONS
J1
VIN
Positive input terminal of the system.
J2
GND
Negative input terminal of the system (ground).
J3-1
PGOOD
PGOOD monitor pin
J3-2
GND
GND
J3-3
GND
GND
J3-4
HIC/LATCH
HIC/LATCH monitor pin
J4
VIN - GND
Test point to monitor VIN input voltage (Do Not short with jumper).
J5
FB - GND
Test point to monitor FB voltage (Do Not short with jumper).
J6
SS - GND
Test point to monitor SS voltage (Do Not short with jumper).
J7
COMP - GND
Test point to monitor COMP voltage (Do Not short with jumper).
J8
IMON/DE - GND
Test point to monitor IMON/DE voltage.
Default setting, a jumper is populated at J8 (shorted to GND) and average current limit is disabled.
To activate 4A average current limit feature, remove J8.
To adjust the average current limit level, replace resistor (R
4
) between IMON/DE and GND. (Do Not short both J8
and J11 with jumper at same time).
J9
ISEN1P - GND
Test Point to monitor ISEN1P waveform. (Do Not short with jumper) For accurate monitoring of the voltage
difference between ISEN1P and ISEN1N, place a differential probe between Pin 2 of J9 and Pin 2 of J16.
J10
GND - EN - VIN
EN signal input terminal. Connect an external enable signal (no higher than VCC voltage) between Pin 1 and Pin 2
of J10 to manually enable/disable the system.
*All voltages in this table are relative to potential at GND (J2). If J28 is shorted with a jumper, short between Pin
2 and Pin 3 of J10 to enable the system automatically when VIN is applied.
J11
IMON/DE -VCC
Short with jumper to make the system operate with Forced PWM mode. Diode Emulation Mode (DE mode) will be
disabled (Do Not short both J8 and J11 with jumper at same time).
J12
VCC - GND
Test point to monitor the VCC voltage (Do Not short with jumper).
J13
GND - HIC/LATCH –
VCC
Protection operation mode (hiccup/latch-off) selection pins. Connect to VCC with jumper for hiccup operation or
short to GND for latch-off operation (Do Not short both side at the same time).
J14
PGOOD - GND
Test point to monitor PGOOD output (Do Not short with jumper).
J15
PH - UG
Test point to monitor the gate voltage (Gate-to-Source voltage) of the high side transistor (Do Not short with
jumper).
J16
ISEN1N - GND
Test point to monitor ISEN1N waveform. (Do Not short with jumper) For accurate monitoring of the voltage
difference between ISEN1P and ISEN1N, place a differential probe between Pin 2 of J9 and Pin 2 of J16.
J17
FSYNC - GND
External synchronization clock input terminal or test point for the FSYNC pin voltage (Do Not short with jumper).
J18
LG - GND
Test point to monitor the gate voltage of the low side transistor (Do Not short with jumper).
J19
CLKOUT - GND
Test point to monitor the output clock (Do Not short with jumper).
J20
PHASE - GND
Test point to monitor the PHASE waveform (Do Not short with jumper).
J21
PVCC - GND
Test point to monitor the internal LDO output voltage (PVCC) (Do Not short with jumper).
STATUS
MIN VOLTAGE FOR EN PIN*
(V)
MAX VOLTAGE FOR EN PIN*
(V)
ISL78268 Enabled
1.2
VCC Voltage
ISL78268 Disabled
0
1.1
