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Intel® Xeon Phi™ Coprocessor D

EVELOPER

Q

UICK 

S

TART 

G

UIDE

 

 

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switch, which provides an alternative to editing your source files in some situations (applies to the pragma-
based offload methods).  Finally, 

-no-offload

 provides a way to make the compiler ignore the 

_Cilk_offload

 and 

#pragma_offload

 constructs (which cause it by default to build a heterogeneous 

binary). 

Debugging During Runtime 

To debug offload activity, the following environment variables are available: 

 

To learn whether offload portions of the program are running on the host or coprocessor 

For csh

 – 

setenv H_TRACE 1

 

For sh – 

export H_TRACE=1

 

 

For more complete debug information 

For csh – 

setenv H_TRACE 2

 

For sh – 

export H_TRACE=2

 

 

To print the compiler’s internal offload timers, a value of 1 reports just the time the offload took 
measured by the host, and the amount of computation time done by the coprocessor.  A value of 
2 adds information on how much data was transferred in either direction.  

For csh – 

setenv OFFLOAD_REPORT <1 or 2> 

 

For sh – 

export OFFLOAD_REPORT=<1 or 2> 

 

Details can be found in the compiler documentation in the “Compilation/Setting Environment Variables” section. 
 

Where to Get More Help 

You can visit the Forum on the Intel® Xeon Phi™ Coprocessor to post questions. It can be found at the 

http://software.intel.com/en-us/forums/intel-many-integrated-core

 

.

 

 

Using the Offload Compiler – Explicit Memory Copy Model 

In this section, a reduction is used as an example to show a step-by-step approach for developing applications 
for  the  Intel®  Xeon  Phi™  Coprocessor  using  the  offload  compiler.  The  offload  compiler  is  a 

heterogeneous

2

 

compiler, with both host CPU and target compilation environments. Code for both the host CPU and Intel® Xeon 
Phi™ coprocessor is compiled within the host environment, and offloaded code is automatically run within the 
target  environment.    The  offload  behavior  is  controlled  by  compiler  directives:  pragmas  in  C/C++,  and 
directives in Fortran. 
 
Some common libraries, such as the Intel® Math Kernel Library (Intel® MKL), are available in host versions as 
well as target versions. When an application executes its first offload and the target is available, the runtime 
loads the target executable onto the Intel® Xeon Phi™ Coprocessor.   At this time, it also initializes the libraries 
linked  with  the  target  code.  The  loaded  target  executable  remains  in  the  target  memory  until  the  host 
program terminates. Thus, any global state maintained by the library is maintained across offload instances. 
 

                                           

2

 http://dictionary.reference.com/browse/heterogeneous 

Summary of Contents for Xeon Phi

Page 1: ...White Paper Intel Xeon Phi Coprocessor DEVELOPER S QUICK START GUIDE Version 1 7...

Page 2: ...Intel Xeon Phi Coprocessor If It Hangs 11 Monitoring the Intel Xeon Phi Coprocessor 12 Running an Intel Xeon Phi Coprocessor program from the host system 12 Working directly with the uOS Environment I...

Page 3: ...Programming on the Intel Xeon Phi Coprocessor OpenMP Intel Cilk Plus Extended Array Notation 23 Parallel Programming on the Intel Xeon Phi Coprocessor Intel Cilk Plus 24 Parallel Programming on Intel...

Page 4: ...known methods BKMs developed by users at Intel This document does not 1 Cover each tool in detail Please refer to the user guides for the individual tools 2 Provide in depth training Terminology Host...

Page 5: ...e with the Intel Xeon Phi Coprocessor SCI Symmetric Communications Interface the mechanism for inter node communication within a single platform where an node is a Intel Xeon Phi Coprocessor or an Int...

Page 6: ...ty such as loading and unloading executables onto the Intel Xeon Phi Coprocessor invoking functions from the executables on the card and providing a two way notification mechanism between host and car...

Page 7: ...U is a key feature of the Intel MIC Architecture based cores Fully utilizing the vector unit is critical for best Intel Xeon Phi Coprocessor performance It is important to note that Intel MIC Architec...

Page 8: ...rnel 2 6 32 431 SUSE Linux Enterprise Server SLES 11 SP2 kernel 3 0 13 0 27 default or SUSE Linux Enterprise Server SLES 11 SP3 kernel 3 0 76 0 11 default Section 2 1 in readme txt Be sure to install...

Page 9: ...If you acquired a serial number for Intel tools go to the Intel Registration Center IRC at http registrationcenter intel com to register and download the products Click the button Register Product wil...

Page 10: ...MPSS gets started it loads the data collection driver automatically But for some reason if it fails to load the data collection driver you can manually load the driver by going to opt intel vtune_amp...

Page 11: ...Access to the Intel Xeon Phi Coprocessor after Reboot The Intel Xeon Phi Coprocessor will not start when the host system reboots You will need to manually start the Intel Xeon Phi Coprocessor and then...

Page 12: ...o Monitoring the Intel Xeon Phi Coprocessor If you want to monitor the load on your coprocessor its temperature etc run the System Management and Configuration SMC utility See section 8 3 of the MPSS...

Page 13: ...is directory to their default path micinfo provides information about host and coprocessor system configuration micflash updates the flash on the coprocessor saves and retrieves the version and other...

Page 14: ...l MIC Architecture o Intel Threading Building Blocks Intel TBB o Intel Integrated Performance Primitive Intel IPP Libraries packaged separately include o Intel MPI for Linux OS including Intel Many In...

Page 15: ...cture Information on Intel MIC Architecture intrinsics can be found in the Compiler Reference Intrinsics section under Intrinsics for Intel MIC Architecture o Release_notes_ _2013SP1_l_en pdf please r...

Page 16: ...ad opt intel composerxe mkl examples mic_ao blasc and mic_ao blasf o The rest of the samples demonstrate use of MKL via compiler assisted offload opt intel composerxe mkl examples mic_offload Some sam...

Page 17: ...You can visit the Forum on the Intel Xeon Phi Coprocessor to post questions It can be found at the http software intel com en us forums intel many integrated core Using the Offload Compiler Explicit M...

Page 18: ...e programmer uses pragma offload target mic as shown in the example below to mark statements offload constructs that should execute on the Intel Xeon Phi Coprocessor The offloaded region is defined as...

Page 19: ...ode Example 3 Vector Reduction with Offload in C C Asynchronous Offload and Data Transfer Asynchronous offload and data transfer between the host and the Intel Xeon Phi Coprocessor is available For de...

Page 20: ...hared memory there is no hardware that maps some portion of the memory on the Intel Xeon Phi Coprocessor to the host system The memory subsystems on the coprocessor and host are completely independent...

Page 21: ...d Reference Guides The section Restrictions on Offload Using Shared Virtual Memory in the document Intel C Compiler User and Reference Guide shows some restrictions of using this programming model Nat...

Page 22: ...no unusual complications beyond the larger number of threads Parallel Programming on the Intel Xeon Phi Coprocessor OpenMP There is no correspondence between OpenMP threads on the host CPU and on the...

Page 23: ...et mic in size in data length size omp parallel do reduction ret do i 1 size ret ret data i enddo omp end parallel do FTNReductionOMP ret return end function FTNReductionOMP Code Example 6 Fortran Usi...

Page 24: ...available to an application built for the Intel MIC Architecture using Intel Cilk Plus wrap the header files with pragma offload_attribute push target mic and pragma offload_attribute pop as follows p...

Page 25: ...d global data required on the Intel Xeon Phi Coprocessor should be appended by the special function attribute __attribute__ target mic As an example parallel_reduce recursively splits an array into su...

Page 26: ...CReductionTBB data size return ret Code Example 13 Offloading Intel TBB Code to the coprocessor in C C NOTE Codes using Intel TBB with an offload should be compiled with tbb flag instead of ltbb Using...

Page 27: ...offload target mic PHI_DEV in A length matrix_elements free_if 0 in B length matrix_elements free_if 0 in C length matrix_elements free_if 0 Code Example 14 Sending the Data to the Intel Xeon Phi Cop...

Page 28: ...a A N B N beta C N Code Example 17 Controlling Threads on the Intel Xeon Phi Coprocessor Using omp_set_num_threads Intel MKL Automatic Offload Model A few of the host Intel MKL functions are Automatic...

Page 29: ...ugging Intel MIC Architecture applications under the Debugging with the Intel Debugger on Eclipse and Debugging on the Command Line sections of opt intel composerxe Documentation en_US debugger debugg...

Page 30: ...efore joining Intel Charles was a consulting software engineer for Oracle Corporation where he concentrated on parallelism and 64 bit support in Windows NT and OpenVMS versions of the Oracle RDBMS on...

Page 31: ...SUCH MISSION CRITICAL APPLICATION WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN MANUFACTURE OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS Intel may make changes to specif...

Page 32: ...ions include SSE2 SSE3 and SSE3 instruction sets and other optimizations Intel does not guarantee the availability functionality or effectiveness of any optimization on microprocessors not manufacture...

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