Intel® Xeon Phi™ Coprocessor D
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Working directly with the uOS Environment Intel® Xeon Phi™ Coprocessor
Since the coprocessor is running Linux and is effectively a separate network node, root or non-root users can
log into it via “
ssh
” and issue many common Linux commands. Files are transferred to/from the coprocessor
using “
scp
” or other means.
The default IP address for the coprocessor as seen from the host is
172.31.<coprocessor>.1
, while the
coprocessor sees the host at
172.31.<coprocessor>.254
by default. The coprocessor can also be
referred to from the host by the alias
mic<coprocessor>
. For example, the first coprocessor you install in
your system is called “
mic0
” and is located at
172.31.1.1
. It sees the host as
172.31.1.254
. If a second
coprocessor were installed, it would be called “
mic1
” and located at
172.31.2.1
, and it would see the host
as
172.31.2.254
.
F
or detailed information on setting up the card for non-root users, adjusting the network configuration,
mounting an NFS file system exported by the host for use on the Intel® Xeon Phi™ coprocessor, etc., please
see the document Intel® MPSS User’s Guide.
Useful Administrative Tools
This product ships with the following administrative tools, found in the
“/usr/bin
” directory. Root, and
users needing to use these tools, should add this directory to their default path:
micinfo - provides information about host and coprocessor system configuration.
micflash - updates the flash on the coprocessor; saves and retrieves the version and other
information for each section of the flash
micsmc
-
a tool designed to ease the burden of monitoring and managing Intel® Xeon Phi™
coprocessors.
miccheck – a utility for verifying the configuration of an Intel® Xeon Phi™ coprocessor
by running
various diagnostic tests.
micnativeloadex – a utility that will copy an Intel® MIC Architecture native binary to a specified Intel®
Xeon Phi™ coprocessor
r and execute it
micctrl – a tool to help the system administrator configure and restart the coprocessor
micrasd – an application running on the host to handle and log hardware errors.
mpssflash – the POSIX version of
micflash
.
mpssinfo – the POSIX version of
micinfo
.
Please see section 8 in the
MPSS User’s Guide
for details on these tools and their arguments.
Getting Started/Developing Intel® Xeon Phi™ Software
You develop applications for the Intel® MIC Architecture using your existing knowledge of multi-core and SIMD
programming. The offload language extensions allow you to port sections of your code (written in C/C++ or
FORTRAN) to run on the Intel® Xeon Phi™ Coprocessor, or you can port your entire application to the Intel® MIC
Architecture. Best performance will only be attained with highly parallel applications that also use SIMD
operations (generated by the compiler or using compiler intrinsics) for most of their execution.