Connectors and Jumper Blocks
S875WP1-E TPS
Revision 4.0
42
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
A24 Ground
B24 AD25
A55 AD04
B55 AD05
A25 AD24
B25 +3.3
V
A56 Ground
B56 AD03
A26 IDSEL
B26 C/BE3#
A57 AD02
B57 Ground
A27 +3.3
V
B27 AD23
A58 AD00
B58 AD01
A28
AD22
B28
Ground
A59
+5 V (I/O)
B59
+5 V (I/O)
A29 AD20
B29 AD21
A60 REQ64#
B60 ACK64#
A30 Ground
B30 AD19
A61 +5
V
B61 +5
V
A31
AD18
B31
+3.3 V
A62
+5 V
B62
+5 V
Note:
1. The signals (in parentheses) are optional in the PCI specification and are not currently implemented.
2. On PCI Slot 3, A9 becomes P_REQ5#
3. On PCI Slot 3, B10 becomes P_GNT5#
4. On PCI Slot 3, B14 becomes CK_P_33M_S3_RISER
5.3 AGP
Connector
Table 24. AGP Connector
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
A1 +12
V
B1 Not
connected
A34
Vddq
B34
Vddq
A2 TYPEDET# B2 +5
V
A35
AD22
B35
AD21
A3 Reserved
B3 +5
V
A36
AD20
B36
AD19
A4 Not
connected
B4 Not
connected
A37
Ground
B37
Ground
A5 Ground
B5 Ground
A38
AD18
B38
AD17
A6 INTA#
B6 INTB#
A39
AD16
B39
C/BE2#
A7 RST#
B7 CLK
A40
Vddq
B40
Vddq
A8 GNT1#
B8 REQ#
A41
FRAME#
B41
IRDY#
A9 Vcc3.3
B9 Vcc3.3
A42
Reserved
B42
+3.3
V
(aux)
A10 ST1
B10 ST0
A43 Ground
B43 Ground
A11 Reserved
B11 ST2
A44 Reserved
B44 Reserved
A12 PIPE#
B12 RBF#
A45 Vcc3.3
B45 Vcc3.3
A13 Ground
B13 Ground
A46 TRDY#
B46 DEVSEL#
A14 WBF#
B14 Reserved
A47 STOP#
B47 Vddq
A15 SBA1
B15 SBA0
A48 PME#
B48 PERR#
A16 Vcc3.3
B16 Vcc3.3
A49 Ground
B49 Ground
A17 SBA3
B17 SBA2
A50 PAR
B50 SERR#
A18 SBSTB#
B18 SB_STB
A51 AD15
B51 C/BE1#
A19 Ground
B19 Ground
A52 Vddq
B52 Vddq
A20 SBA5
B20 SBA4
A53 AD13
B53 AD14
A21 SBA7
B21 SBA6
A54 AD11
B54 AD12
A22 Reserved
B22 Reserved
A55 Ground
B55 Ground
A23 Ground
B23 Ground
A56 AD9
B56 AD10
A24 Reserved
B24 +3.3
V
(aux)
A57 C/BE0#
B57 AD8