Intel S3420GP, Specification

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Functional Architecture Intel® Server Board S3420GP TPS
Revision 2.4
Intel order number E65697-010
28
The ServerEngines* LLC Pilot II Integrated BMC is provided by an embedded ARM9 controller
and associated peripheral functionality that is required for IPMI-based server management.
Firmware usage of these hardware features is platform-dependant.
The following is a summary of the Integrated BMC management hardware features used by the
ServerEngines* LLC Pilot II Integrated BMC:

250 MHz 32-bit ARM9 Processor

Memory Management Unit (MMU)

Two 10/100 Ethernet Controllers with NC-SI support

16-bit DDR2 667 MHz interface

Dedicated RTC

12 10-bit ADCs

Eight Fan Tachometers

Four PWMs

Battery-backed Chassis Intrusion I/O Register

JTAG Master

Six I
2
C interfaces

General-purpose I/O Ports (16 direct, 64 serial)
Additionally, the ServerEngines* Pilot II part integrates a super I/O module with the following
features:
 KCS/BT Interface
 Two 16C550 Serial Ports
 Serial IRQ Support
 12 GPIO Ports (shared with BMC)
 LPC to SPI Bridge

SMI and PME Support
The Pilot II contains an integrated KVMS subsystem and graphics controller with the following
features:

USB 2.0 for keyboard, mouse, and storage devices
 USB 1.1 interface for legacy PS/2 to USB bridging
 Hardware Video Compression for text and graphics
 Hardware encryption
 2D Graphics Acceleration
 DDR2 graphics memory interface
 Up to 1600x1200 pixel resolution
 PCI Express* x1 support