Volume 1, Part 1: Floating-point Programming Model
1:85
Floating-point Programming Model
5
The floating-point architecture is fully compliant with the ANSI/IEEE Standard for
Binary Floating-Point Arithmetic (Std. 754-1985). There is full IEEE support for single,
double, and double-extended real formats. The two IEEE methods for controlling
rounding precision are supported. The first method converts results to the
double-extended exponent range. The second method converts results to the
destination precision. Some IEEE extensions such as fused multiply and add, minimum
and maximum operations, and a register format with a larger range than the minimum
double-extended format are also included.
5.1
Data Types and Formats
Six data types are supported directly: single, double, double-extended real (IEEE real
types); 64-bit signed integer, 64-bit unsigned integer, and the 82-bit floating-point
register format. A “Parallel FP” format where a pair of IEEE single precision values
occupy a floating-point register’s significand is also supported. A seventh data type,
IEEE-style quad-precision, is supported by software routines. A future architecture
extension may include additional support for the quad-precision real type.
5.1.1
Real Types
The parameters for the supported IEEE real types are summarized in
.
5.1.2
Floating-point Register Format
Data contained in the floating-point registers can be either integer or real type. The
format of data in the floating-point registers is designed to accommodate both of these
types with no loss of information.
Table 5-1.
IEEE Real-type Properties
Single
Double
Double-Extended
Quad-Precision
IEEE Real-Type Parameters
Sign
+ or
+ or
+ or
+ or
E
max
+127
+1023
+16383 +16383
E
min
126
1022
16382
16382
Exponent bias
+127
+1023
+16383
+16383
Precision (bits)
24
53
64
113
IEEE Memory Formats
Total memory format width (bits)
32
64
80
128
Sign field width (bits)
1
1
1
1
Exponent field width (bits)
8
11
15
15
Significand field width (bits)
23
52
64
112
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...