Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 271 / 1898

Volume 2, Part 1: System State and Programming Model 2:23
3.3.2 Processor Status Register (PSR)
The PSR maintains the current execution environment. The PSR is divided into four
overlapping sections (See
Figure 3-2 ): user mask bits (PSR{5:0}), system mask bits
(PSR{23:0}), the lower half (PSR{31:0}), and the entire PSR (PSR{63:0}). PSR fields
are defined in
Table 3-2 along with serialization requirements for modification of each
field and the state of the field after an interruption.
The PSR instructions and their serialization requirements are defined in Table 3-1 .
These instructions explicitly read or write portions of the PSR. Other instructions also
read and write portions of the PSR as described in
Table 3-2 and Table 5-2 .
The user mask, PSR{5:0}, can be set and cleared by the Set User Mask (
sum
), Reset
User Mask (
rum
) and Move to User Mask (
mov psr.um=
) instructions at any privilege
level. For user mask modifications by
sum, rum
and
mov
, the processor ensures all side
effects are observed before subsequent instruction groups.
Figure 3-2. Processor Status Register (PSR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rv rt tb lp db si di pp sp dfh dfl dt rv pk i ic rv mfh mfl ac up be rv
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
rv vm ia bn ed ri ss dd da id it mc is cpl
Table 3-1. Processor Status Register Instructions
Mnemonic Description Operation
Instr.
Type
Serialization
Required
sum imm
Set user mask
from immediate PSR{5:0}

PSR{5:0} | imm M implicit
rum imm
Reset user
mask from
immediate PSR{5:0}

PSR{5:0} & ~ imm M implicit
mov psr.um = r
2
Move to user
mask PSR{5:0}

GR[ r
2
] M implicit
mov r
1
= psr.um
Move from user
mask GR[ r
1
]

PSR{5:0} M none
ssm imm
Set system
mask from
immediate PSR{23:0}

PSR{23:0} | imm M data/inst
a
a. Based upon the resource being serialized, use data or instruction serialization.
rsm imm
Reset system
mask from
immediate PSR{23:0}

PSR{23:0} &~ imm M data/inst
a
mov psr.l = r
2
Move to lower
PSR PSR{31:0}

GR[ r
2
] M data/inst
a
mov r
1
= psr
Move from PSR GR[ r
1
]

PSR{36:35,31:0}
b
b. All other bits of the PSR read as zero.
M none
bsw.0, bsw.1
Bank switch PSR{44}

0

or 1 B implicit
vmsw.0, vmsw.1
Virtual machine
switch PSR{46}

0

or 1 B implicit
rfi
Return From
Interruption PSR{63:0}

IPSR B implicit
system mask
user mask