Errata
Intel
®
Core
™
2 Duo Processor
Specification Update
21
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AW9.
A REP STOS/MOVS to a MONITOR/MWAIT Address Range May
Prevent Triggering of the Monitoring Hardware
Problem:
The MONITOR instruction is used to arm the address monitoring hardware for
the subsequent MWAIT instruction. The hardware is triggered on subsequent
memory store operations to the monitored address range. Due to this
erratum, REP STOS/MOVS fast string operations to the monitored address
range may prevent the actual triggering store to be propagated to the
monitoring hardware.
Implication:
A logical processor executing an MWAIT instruction may not immediately
continue program execution if a REP STOS/MOVS targets the monitored
address range.
Workaround:
Software can avoid this erratum by not using REP STOS/MOVS store
operations within the monitored address range.
Status:
For the steppings affected, see the Summary Tables of Changes.
AW10.
Performance Monitoring Event MISALIGN_MEM_REF May Over Count
Problem:
Performance monitoring event MISALIGN_MEM_REF (05H) is used to count
the number of memory accesses that cross an 8-byte boundary and are
blocked until retirement. Due to this erratum, the performance monitoring
event MISALIGN_MEM_REF also counts other memory accesses.
Implication:
The performance monitoring event MISALIGN_MEM_REF may over count. The
extent of the over counting depends on the number of memory accesses
retiring while the counter is active.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
AW11.
The Processor May Report a #TS Instead of a #GP Fault
Problem:
A jump to a busy TSS (Task-State Segment) may cause a #TS (invalid TSS
exception) instead of a #GP fault (general protection exception).
Implication:
Operation systems that access a busy TSS may get invalid TSS fault instead
of a #GP fault. Intel has not observed this erratum with any commercially
available software.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
