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Datasheet
3
Contents
1
Introduction ..............................................................................................................7
1.1
Terminology .......................................................................................................8
1.2
References .........................................................................................................9
2
Low Power Features ................................................................................................ 11
2.1
Clock Control and Low-Power States .................................................................... 11
2.1.1
Core Low-Power State Descriptions........................................................... 13
2.1.2
Package Low-power State Descriptions...................................................... 14
2.2
Enhanced Intel SpeedStep® Technology .............................................................. 17
2.3
Extended Low-Power States................................................................................ 18
2.4
FSB Low Power Enhancements ............................................................................ 19
2.5
Processor Power Status Indicator (PSI-2) Signal .................................................... 19
3
Electrical Specifications ........................................................................................... 21
3.1
Power and Ground Pins ...................................................................................... 21
3.2
Decoupling Guidelines........................................................................................ 21
3.2.1
VCC
Decoupling...................................................................................... 21
3.2.2
FSB AGTL+ Decoupling ........................................................................... 21
3.2.3
FSB Clock (BCLK[1:0]) and Processor Clocking........................................... 21
3.3
Voltage Identification and Power Sequencing ........................................................ 22
3.4
Catastrophic Thermal Protection .......................................................................... 25
3.5
Reserved and Unused Pins.................................................................................. 25
3.6
FSB Frequency Select Signals (BSEL[2:0])............................................................ 25
3.7
FSB Signal Groups............................................................................................. 26
3.8
CMOS Signals ................................................................................................... 27
3.9
Maximum Ratings.............................................................................................. 27
3.10 Processor DC Specifications ................................................................................ 28
4
Package Mechanical Specifications and Pin Information .......................................... 33
4.1
Package Mechanical Specifications ....................................................................... 33
4.2
Processor Pinout and Pin List .............................................................................. 36
4.3
Alphabetical Signals Reference ............................................................................ 59
5
Thermal Specifications and Design Considerations .................................................. 67
5.1
Monitoring Die Temperature ............................................................................... 69
5.1.1
Thermal Diode ....................................................................................... 69
5.1.2
Intel® Thermal Monitor........................................................................... 70
5.1.3
Digital Thermal Sensor............................................................................ 72
5.2
Out of Specification Detection ............................................................................. 73
5.3
PROCHOT# Signal Pin ........................................................................................ 73
Figures
1
Core Low-Power States ............................................................................................. 12
2
Package Low-Power States ........................................................................................ 13
3
Active VCC and ICC Loadline for Pentium Processors..................................................... 30
4
1-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2)................................... 34
5
1-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2) .................................. 35
6
Processor Pinout (Top Package View, Left Side)............................................................ 36
7
Processor Pinout (Top Package View, Right Side).......................................................... 37
Summary of Contents for BX80532PG3200D
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