8 User’s Guide
&+,36
ABHiQV
(Fab Rev. C)
Subject to Change Without Notice
Revision 1.1 7/15/98
Notes:
*Schematic reference and functional category
**’on’ - jumper plug is installed
’off - jumper plug is not installed
1.
For PAL, U1/U4 on DKHiQV-PCI DK board must be replaced with a 17.7344 MHz crystal oscil-
lator.
2.
Using BMP utility, change RAM BIOS to enable TV through GPIO0 and enable output
composite sync in NTSC/PAL.
Table 6: DKHiQV-PCI Jumper configuration settings for Multimedia Enabled on B69000 and
B65555
Note: Refer to Figure 3 for jumper locations.
Notes: *Schematic reference and functional category
**’on’ - jumper plug is installed
’off’ - jumper plug is not installed
Table 5: DKHiQV-PCI Jumper configuration settings for TV-out Enabled on B69000 and B65555
Note: Refer to Figure 3 for jumper locations.
Jumper
NTSC
2
Function*
State**
Jumper
PAL
1,2
Function*
State**
W2
sh. 5, TV OUT
off
W2
sh.5, TV OUT
Off
W4
sh.5, TV OUT
1-2
W4
sh.5, TV OUT
2-3
W5
sh.2, TV OUT, disable CRT
off
W5
sh.5, TV OUT, disable CRT
Off
W6
sh.5, TV OUT, NTSC
off
W6
sh.5, TV OUT, PAL
On
W8
sh.2, TV OUT, TSYNC
off
W8
sh.2, TV OUT, TSYNC
Off
JP1
sh.5, TV OUT
On
JP1
sh.5, TV OUT
On
JP2
sh.5, TV OUT
On
JP2
sh.5, TV OUT
On
JP3
sh.5, TV OUT
On
JP3
sh.5, TV OUT
On
JP13
sh.2, CSYNC/HSYNC
On
JP13
sh.2, CSYNC/HSYNC
On
Jumper
Function*
State**
JP5
sh.2, I2C
1-2, 3-4
JP6
sh.2, I2C
All off
JP7
sh.2, DDC
1-2, 3-4
JP8
sh.2, DDC
All off
JP9
sh.2, GPIO
2-3
JP10
sh.2, GPIO
1-4
JP11
sh.2, GPIO
1-4, 2-3
JP12
sh.2, GPIO
off
