Integra DTR-5.9, Service Manual, Page: 51 / 212

DTR-5.9
TERMINAL DESCRIPTION (2/2)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-14
Q3001 : AN15880A(Video SW for Receiver with Multi-signal)-3/3
Input V5 64
Input MUTE 59
Input V1 60
Input V2 61
Input V3 62
Input V4 63
Output VOUT1 58
Input S9 57
Input S8 56
Power supply VCC3 55
Output VOUT2 54
Ground GND3 53
Input S7 52
Input S6 51
--- NC5 50
Output VOUT3 49
--- NC4 48
Input S10 47
Output YOUT1 46
Output YOUT2 45
Output YOUT3 44
--- NC3 43
VCC4 42
Output COUT1 41
COUT2 40
COUT3 39
GND4 38
CYOUT1 37
---
Output
Ground
Output
Output
NC2 36 No connection
CYOUT1 signal output
Ground
COUT3 signal output
COUT2 signal output
COUT1 signal output
5.0 V power supply
No connection
YOUT3 signal output
YOUT2 signal output
YOUT1 signal output
Logic control input 10
No connection
VOUT3 signal output
No connection
Logic control input 6
Logic control input 7
Ground
VOUT2 signal output
5.0 V power supply
Logic control input 8
Logic control input 9
VOUT1 signal output
Logic mute control input
Video composite signal input 1
Video composite signal input 2
Video composite signal input 3
Video composite signal input 4
Video composite signal input 5
Description Type Pin name Pin No.
Power supply