User Guide EVAL-1ED020I12F2-DB
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v1.0
2021-06-21
EVAL-1ED020I12F2-DB user guide
Isolated driver daughter board to evaluate 1200 V CoolSiC™ MOSFET
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3
System design
3.1
Schematics
Figure 8 shows the drawing of the daughterboard 1ED020I12F2-DB.
Figure 8
Drawing of EVAL-1ED020I12F2-DB
3.2
Layout
The following figures present the different layers of the layout from the daughterboard EVAL-1ED020I12F2-DB.
Due to the small dimensions of the design, a 4-layer layout was provided. The order from the top view: Top
layer, Layer 1, Layer 2, Bottom layer