CY8CKIT-147 PSoC® 4100PS Prototyping Kit Guide, Doc. #: 002-18734 Rev. *D
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A.2.5.2
Functionality of J4 and J5 Headers (PSoC 4100PS to KitProg2)
The KitProg2 and target boards each contain a 1x5-pin header. These headers provide a physical
connection between the two devices. Specifically, the connection includes the SWD interface,
required to program/debug the target PSoC 4100PS device, power, ground, and reset.
Figure A-6. J4 and J5 Headers
When the boards are separated, the KitProg2 board can be used to program any other PSoC 3,
PSoC 4, PSoC 5LP family of devices via J4.
Table A-3. Pin Details of J4 Header
Table A-4. Pin Details of J5 Header
PSoC 5LP (J4)
Pin
Signal
Description
J4_01
VTARG
Power
J4_02
GND
Ground
J4_03
P12.4
Reset
J4_04
P12.3
SWD_CLK
J4_05
P12.2
SWD_IO
PSoC 4100PS (J5)
Pin
Signal
Description
J5_01
VTARG
Power
J5_02
GND
Ground
J5_03
XRES
Reset
J5_04
P3.3
SWD_CLK
J5_05
P3.2
SWD_IO
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