User’s Manual
10-5
05.99
OTP Memory Operation
C513AO-2E Only
10.3
OTP Programming Mode - Pin Definitions
The functional description of all C513AO-2E pins which are required for OTP memory programming
are provided in Table 10-1.
Table 10-1
Pin Definitions and Functions of the C513AO-2E in Programming Mode
Symbol
Pin Number
I/O
*)
Function
P-DIP
-40
P-LCC
-44
P-M
QFP
-44
RESET
9
10
4
I
Reset
This input must be at static “1” (active) level throughout
Programming Mode.
PMSEL0
PMSEL1
10,
11
11,
13
5
7
I
I
Programming Mode Selection Pins
These pins are used to select the different access modes
in Programming Mode. PMSEL1,0 must satisfy a set up
time to the rising edge of PALE. When the logic level of
PMSEL1,0 is changed, PALE must be at low level.
PSEL
12
14
8
I
Basic Programming Mode Select
This input is used for the basic Programming Mode
selection and must be switched according to Figure 10-5.
PRD
13
15
9
I
Programming Mode Read Strobe
This input is used for read access control for OTP memory
read, Version Register read, and lock bit read operations.
PALE
14
16
10
I
Programming Address Latch Enable
PALE is used to latch the high address lines. The high
address lines must satisfy a set up and hold time to/from
the falling edge of PALE. PALE must be at low level when
the logic level of PMSEL1,0 is changed.
XTAL1
19
21
15
I
XTAL1
Input to the oscillator amplifier.
*) I = Input
O = Output
PMSEL1
PMSEL0
Access Mode
0
0
Reserved
0
1
Read signature bytes
1
0
Program/read lock bits
1
1
Program/read OTP memory byte
