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| COPYRIGHT 2017 | | 3
Demonstration System EPC9067
Figure 2: Proper connection and measurement setup
Figure 3: Proper measurement of the switch node
Figure 1: Block diagram of EPC9067 development board
Q
1
V
IN
Q
2
C
Bypass
Le
ve
l s
hi
ft
PGND
Gate drive
regulator
Logic and
dead-time
adjust
V
DD
GND
PWM
L
Buck
C
OUT
C
ZVS
DC output
L
ZVS
HF output
7.5 – 12 V
DC
V
IN
supply
(note polarity)
High frequency
connection
Switch-node
oscilloscope probe
Ground post
Dead-time
setting
(if installed)
+
DC output
measurement
V
+
Main voltage
measurement
V
52 V
DCmax
V
Main
supply
(note polarity)
DC output
Control signal
inputs
SMA (optional)
Do not use
probe ground lead
Ground probe
against post
Place probe tip
in large via
Minimize loop