IEPC EPC9067 Quick Start Manual Download Page 2

QUICK START GUIDE

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WWW.EPC-CO.COM

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Demonstration System EPC9067

DESCRIPTION 

The EPC9067 development board is a 65 V maximum device voltage, 
2.7 A maximum output current, half bridge with onboard gate drives, 
featuring the EPC8009 enhancement mode (eGaN®) field effect transistor 
(FET). The gate driver has been configured with a synchronous FET 
bootstrap circuit featuring the EPC2038 eGaN FET that eliminates high 
side device losses induced by the reverse recovery losses of the internal 
bootstrap diode of the gate driver. The purpose of this development 
board is to simplify the evaluation process of the EPC8009 eGaN FET by 
including all the critical components on a single board that can be easily 
connected into any existing converter. The inclusion of the synchronous 
FET bootstrap circuit enables significant increase in operating frequency 
capability of the half bridge circuit.

The EPC9067 development board is 2” x 1.5” and has two EPC8009 eGaN 
FETs in a half bridge configuration using Texas Instruments LM5113 gate 
driver with supply and bypass capacitors. The board contains all critical 
components and layout for optimal switching performance. There are 
also various probe points to facilitate simple waveform measurement 
and efficiency calculation. The board includes pads for the inclusion of 
customer components to facilitate testing in a Buck converter or ZVS 
class-D amplifier configurations. A complete block diagram of the circuit 
is given in figure 1. 

For more information on the EPC8009 and EPC2038 eGaN FETs please 
refer to the datasheet available from EPC at 

www.epc-co.com

. The 

datasheet should be read in conjunction with this quick start guide.

Table 1: Performance Summary (T

A

 = 25°C) EPC9067 

Symbol

Parameter

Conditions

Min

Max Units

V

DD

Gate Drive Input Supply 

Range

7.5

12

V

V

IN

Bus Input Voltage Range 

52*

V

V

OUT

Switch Node Output Voltage

65

V

I

OUT

Switch Node Output Current

2.7*

A

V

PWM

PWM Logic Input Voltage 

Threshold

Input ‘High’ 

Input ‘Low’

3.5 

0

1.5

V

Minimum ‘High’ State Input 

Pulse Width

V

PWM

 rise and 

fall time < 10ns

40

ns

Minimum ‘Low’ State Input 

Pulse Width

V

PWM

 rise and 

fall time < 10ns 160

#

ns

*Assumes inductive load, maximum current depends on die temperature – actual maximum current 
with be subject to switching frequency, bus voltage and thermals. 
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.

QUICK START PROCEDURE 

Development board EPC9067 is easy to set up to evaluate the performance 
of the EPC8009 eGaN FET. Refer to figure 2 for proper connect and 
measurement setup and follow the procedure below: 
1. Configure the board for either ZVS class-D operation OR Buck converter 

operation.

2. With power off, connect the input power supply bus to +V

IN

 (J1) and 

ground / return to –V

IN

 (J4). 

3. For ZVS class-D operation, with power off, connect a HF load to the HF 

output (RF-J2 OR Vsw-J3 and GND-J4). For Buck converter operation, 
with power off, connect a DC load to the DC output (+V

OUT 

-J5 and 

GND-J4).

4. With power off, connect the gate drive input to +V

DD

 (J90, Pin-1) and 

ground return to –V

DD

 (J90, Pin-2).

5. With power off, connect the input PWM control signal to PWM (J70,  

Pin-1) and ground return to either Pin-2 or Pin-4 of J70.

6. Turn on the gate drive supply – make sure the supply is within the  

7.5 V and 12 V range.

7. Turn on the controller / PWM input source and probe switching node to 

observe switching operation.

8. Turn on the bus voltage to the required value (do not exceed the 

absolute maximum voltage of 52 V on V

OUT

). Increase voltage slowly 

while monitoring operation to ensure the FETs are operating within 
their datasheet parameters.

9. Once operational, adjust the bus voltage and load PWM control 

within the operating range and observe the output switching 
behavior, efficiency and other parameters.

10. For shutdown, please follow steps in reverse.

NOTE

When measuring the high frequency content switch node, care 

must be taken to avoid long ground leads. Measure the switch node by 
placing the oscilloscope probe tip through the large via on the switch 
node (designed for this purpose) and grounding the probe directly 
across the GND terminal provided. See figure 3 for proper scope probe 
technique.

EPC9067 development board 

Summary of Contents for EPC9067

Page 1: ...Development Board EPC9067 Quick Start Guide EPC8009 65VHalfBridgewithSyncFETBootstrapGateDrive ...

Page 2: ... Voltage Threshold Input High Input Low 3 5 0 6 1 5 V V Minimum High State Input Pulse Width VPWM rise and fall time 10ns 40 ns Minimum Low State Input Pulse Width VPWM rise and fall time 10ns 160 ns Assumesinductiveload maximumcurrentdependsondietemperature actualmaximumcurrent withbesubjecttoswitchingfrequency busvoltageandthermals Limitedbytimeneededto refresh highsidebootstrapsupplyvoltage QUI...

Page 3: ...CBypass Level shift PGND Gatedrive regulator Logicand dead time adjust VDD GND PWM LBuck COUT CZVS DC output LZVS HF output 7 5 12 VDC VIN supply notepolarity Highfrequency connection Switch node oscilloscope probe Groundpost Dead time setting if installed DC output measurement V Mainvoltage measurement V 52 VDCmax VMain supply notepolarity DC output Control signal inputs SMA optional Donot use pr...

Page 4: ... NC7SZ00L6X 23 1 U71 IC s 2 Input AND Gate Tiny Logic 1 65 V to 5 5 V 32 mA Fairchild NC7SZ08L6X 24 4 TP1 TP2 TP3 TP4 Test Point Test Point Subminiature Keystone 5015 25 0 19 J70 J90 GP1 See Note 1 Headers Male Vertical 36 Pin 230 Contact Height 1 Center Pitch FCI 68001 236HLF 26 4 J1 J3 J4 J5 Headers 2 Rows by 2 Pins 1 Male Vertical 1 Center Pitch TE Connectivity 5 146256 2 Optional Components It...

Page 5: ...TP1 1 TP2 Vmain Q1 GRret1 PGND PGND PGND PGND PGND PGND PGND GRH1 GLH1 Vmain Vmain Vmain Vmain Vmain 1 2 3 4 J70 PWM1 PWM2 DNP 1 2 R73 1 2 R72 PWM2 PWM2 PWM1 PWM1 DNP 0 Ω DNP 0 Ω 1 2 R71 PWM1 Q2 EPC8009 EPC8009 DNP Lbuck D40 BAT54 K FILM PGND C6 Vmain C5 PGND Vmain 5 V 4 7 V 4 7 V GLH1 PGND PGND C7 C40 HS1 DNP C2 C3 Output HF Gbtst Q44 EPC2038 100 V 2 8 Ω 1 2 R45 SDM03U40 D44 EMPTY C46 EMPTY D41 C...

Page 6: ...orcompliancewiththeEuropeanUniondirectiveonelectromagneticcompatibilityoranyothersuchdirectivesorregulations Asboard builds are at times subject to product availability it is possible that boards may contain components or assembly materials that are not RoHS compliant Efficient Power Conversion Corporation EPC makesnoguaranteethatthepurchasedboardis100 RoHScompliant TheEvaluationboard orkit isford...

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