IEI Technology WAFER-PV-D4253, User Manual

Page: 95 / 140

WAFER-PV-D5253/D4253/N4553 SBC
Page 81
5.4.1 Host Bridge
Use the Host Bridge menu ( BIOS Menu 12 ) to configure the host bridge chipset.
Aptio Setup Utility – Copyright (C) 2010 American Megatrends, Inc.
Chipset
******* Memory Information ********
Memory Frequency
667 Mhz
Total Memory 2048 MB
DIMM#0 2048 MB
DIMM#1 Not present
---------------------

: Select Screen
 
: Select Item
EnterSelect
+/-: Change Opt.
F1
General Help
F2 Previous Values
F3 Optimized Defaults
F4 Save & Exit
ESC Exit
Version 2.02.1205. Copyright (C) 2010 American Megatrends, Inc.
BIOS Menu 12:Host Bridge Configuration
5.4.2 South Bridge
Use the South Bridge menu ( BIOS Menu 13 ) to configure the Southbridge chipset.
Aptio Setup Utility – Copyright (C) 2010 American Megatrends, Inc.
Chipset
Auto Power Button Function [Enabled]
HD Audio Controller [Enabled]
USB Function [Enabled]
USB 2.0(EHCI) Support [Enabled]
Set Spread Spectrum function [Disabled]
Enable/Disable OnBoard
High Definition Audio
Controller.
---------------------

: Select Screen
 
: Select Item
EnterSelect
+/-: Change Opt.
F1
General Help
F2 Previous Values
F3 Optimized Defaults
F4 Save & Exit
ESC Exit
Version 2.02.1205. Copyright (C) 2010 American Megatrends, Inc.
BIOS Menu 13:Southbridge Chipset Configuration