SPCIE-3600AM2 PICMG 1.3 CPU Card
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bus and have separate electrical contacts on each side of the module.
EHCI
The Enhanced Host Controller Interface (EHCI) specification is a
register-level interface description for USB 2.0 Host Controllers.
FSB
The Front Side Bus (FSB) is the bi-directional communication channel
between the processor and the Northbridge chipset.
GbE
Gigabit Ethernet (GbE) is an Ethernet version that transfers data at 1.0
Gbps and complies with the IEEE 802.3-2005 standard.
HDD
Hard disk drive (HDD) is a type of magnetic, non-volatile computer
storage device that stores digitally encoded data.
HyperTransport™
Bus
The HyperTransport™ bus, which uses HyperTransport™ technology.
interfaces an AMD CPU with the Northbridge. HyperTransport™
technology provides a high-speed, low latency, point-to-point link
between the CPU and the Northbridge.
L1 Cache
The Level 1 Cache (L1 Cache) is a small memory cache built into the
system processor.
L2 Cache
The Level 2 Cache (L2 Cache) is an external processor memory
cache.
MAC
The Media Access Control (MAC) protocol enables several terminals
or network nodes to communicate in a LAN, or other multipoint
networks.
PCIe
PCI Express (PCIe) is a communications bus that uses dual data lines
for full-duplex (two-way) serial (point-to-point) communications
between the SBC components and/or expansion cards and the SBC
chipsets. Each line has a 2.5 Gbps data transmission rate and a 250
MBps sustained data transfer rate.
POST
The Power-on Self Test (POST) is the pre-boot actions the system
performs when the system is turned-on.
RAID
Redundant Array of Inexpensive Disks (RAID) refers to redundantly
backing up data on multiple disks to ensure that if one disk fails, the
data is not lost and can be restored from the remaining disks in the
array.
RAM
Random Access Memory (RAM) is volatile memory that loses data
when power is lost. RAM has very fast data transfer rates compared to
other storage like hard drives.
SATA
Serial ATA (SATA) is a serial communications bus designed for data
Summary of Contents for SPCIE-3600AM2
Page 1: ...Page i...
Page 2: ...Page ii Revision Date Version Changes 2008 01 28 1 00 Initial release...
Page 17: ...Page xvii Table 6 1 BIOS Navigation Keys 95...
Page 19: ......
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Page 21: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 1 1 Introduction Chapter 1...
Page 27: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 7 2 Detailed Specifications Chapter 2...
Page 53: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 33 3 Unpacking Chapter 3...
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Page 59: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 39 4 Connector Pinouts Chapter 4...
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Page 85: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 65 5 Installation Chapter 5...
Page 113: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 93 6 BIOS Screens Chapter 6...
Page 159: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 139 7 RAID Setup Chapter 7...
Page 165: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 145 8 Software Drivers Chapter 8...
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Page 183: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 163 A BIOS Options Appendix A...
Page 187: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 167 B Terminology Appendix B...
Page 191: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 171 C Watchdog Timer Appendix C...
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Page 195: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 175 D Address Mapping Appendix D...
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Page 199: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 179 E Compatibility Appendix E...
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Page 203: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 183 F Hazardous Materials Disclosure Appendix F...
Page 207: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 187 G RAID Levels Appendix G...
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Page 211: ...SPCIE 3600AM2 PICMG 1 3 CPU Card Page 191 H Index...