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Appendix A. Watch-Dog Timer
The Watch-Dog Timer is provided to ensure that standalone systems can always
recover from catastrophic conditions that caused the CPU to crash. This condition
may have occurred due to external EMI or a software bug. When the CPU stops
working correctly, onboard hardware will either perform a hardware reset (cold
boot) or a non-maskable interrupt (NMI) to bring the system back to a known
state.
The Watch-Dog Timer is controlled by two I/O ports.
443 (hex)
Read
Enable the refresh the Watch-Dog Timer.
843 (hex)
Read
Disable the Watch-Dog Timer.
To enable the Watch-Dog Timer, a read from I/O port 443H must be performed.
This will enable and activate the countdown timer which will eventually time out
and either reset CPU or cause an NMI depending on the setting of JP7. To ensure
that this reset condition does not occur, the Watch-Dog Timer must be
periodically refreshed by reading the same I/O port 433H. This must be done
within the time out period that is selected through jumper group JP8.
A tolerance of at least 30% must be maintained to avoid unknown routines within
the operating system (DOS), such as disk I/O that can be very time consuming.
Therefore if the time out period has been set to 10 seconds, the I/O port 443H
must be read within 7 seconds.
Note:
When exiting a program it is necessary to disable the Watch-Dog Timer,
otherwise the system will reset.
