IDT EB8T5A Eval Board Manual Download Page 1

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July 2009

6024 Silver Creek Valley Road, San Jose, California 95138

Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775

Printed in U.S.A.

IDT

™

89EBPES8T5A

Evaluation Board Manual

(Eval Board: 18-636-002)

Summary of Contents for EB8T5A Eval Board

Page 1: ...lver Creek Valley Road San Jose California 95138 Telephone 800 345 7015 408 284 8200 FAX 408 284 2775 Printed in U S A 2009 Integrated Device Technology Inc IDT 89EBPES8T5A Evaluation Board Manual Eva...

Page 2: ...ure Analysis be performed LIFE SUPPORT POLICY Integrated Device Technology s products are not authorized for use as critical components in life support devices or systems unless a specific written agr...

Page 3: ...Voltage Converter 2 6 PCI Express Digital Power Voltage Converter 2 6 PCI Express Analog Power Voltage Converter 2 6 Core Logic Voltage Converter 2 6 3 3V I O Power Module 2 6 Power up Sequence 2 6 Re...

Page 4: ...IDT Table of Contents EB8T5A Eval Board Manual ii July 23 2009 Notes...

Page 5: ...Vector Signals 2 7 Table 2 8 Boot Configuration Vector Switches S3 S4 and S5 ON 0 OFF 1 2 8 Table 2 9 Slave SMBus Interface Connector 2 9 Table 2 10 SMBus Slave Interface Address Configuration 2 9 Ta...

Page 6: ...IDT List of Tables EB8T5A Eval Board Manual iv July 23 2009 Notes...

Page 7: ...9 List of Figures Figure 1 1 Function Block Diagram of the EB8T5A Eval Board 1 1 Figure 2 1 Clock Distribution Block Diagram 2 3 Figure 2 2 Power Distribution Block Diagram 2 4 Figure 2 3 APWRDIS Timi...

Page 8: ...IDT List of Figures EB8T5A Eval Board Manual vi July 23 2009 Notes...

Page 9: ...umber of PCIe downstream ports The EB8T5A eval board is designed to function as an add on card to be plugged into a x4 PCIe slot available on a motherboard hosting an appro priate root complex micropr...

Page 10: ...d spread spectrum settings Boot mode selection Vaux Support SMBUS Slave Interface 4 pin header SMBUS Master Interface connected to the Serial EEPROMs through I O expander Attention button for each dow...

Page 11: ...ard Manual 1 3 July 23 2009 Notes Revision History September 10 2007 Initial publication of board manual July 23 2009 Added PES6T5 and PES5T5 devices to eval board manual Updated Power Sources section...

Page 12: ...IDT Description of the EB8T5A Eval Board EB8T5A Eval Board Manual 1 4 July 23 2009 Notes...

Page 13: ...storage It provides fan out and switching functions between a PCI Express upstream port and 4 down stream ports or peer to peer switching between downstream ports The EB8T5A has four PCI Express downs...

Page 14: ...ard clock generator must be disabled and the upstream reference clock should be used instead The output of the onboard clock generator is accessible through two SMA connectors located on the Evaluatio...

Page 15: ...hrough a MOSFET switch If add in cards require more power than the upstream slot can support an external source is required to supply this extra power via an auxiliary 4 pin power connector on the boa...

Page 16: ...ock Diagram Vaux Support Power supply support will be provided to EB8T5A from 12 0V upstream power to 3 3Vaux upstream power when in sleep mode The WAKE signal direction both an input and output will...

Page 17: ...g On initial power up APWRDIS must be held low initially for 8 clocks after PERST is removed Then it must be sampled high 256 clocks after PERSTN is removed to enable L2 mode Subsequent PERST will not...

Page 18: ...vel requirements To insure that the sequencing requirements are met a 0 047 F is used at the SOFTSTART cap on the VTTPE s voltage converter U6 pin 36 in the EB8T5A Required Jumpers To deliver power to...

Page 19: ...ntrolled reset through GPIO1 2 3 Fundamental reset PERST default 3 W6 1 2 Software controlled reset through GPIO9 2 3 Fundamental reset PERST default 2 W7 1 2 Software controlled reset through GPIO0 2...

Page 20: ...is accessible through the PCI Express edge connector as well as a 4 pin header as described in Table 2 9 SWMODE 2 0 Switch Mode These configuration pins determine the PES8T5A switch operating mode Def...

Page 21: ...ctor Slave Interface Address Configuration Address Bit Signal 1 SSMBUSADDR 1 2 SSMBUSADDR 2 3 SSMBUSADDR 3 4 0 5 SSMBUSADDR 5 6 1 7 1 Table 2 10 SMBus Slave Interface Address Configuration SMBUS Slave...

Page 22: ...lt and the lower four bits is configurable using switch S4 as described in Table 2 12 JTAG Header The PES8T5A provides a JTAG connector J4 for access to the PES8T5A JTAG interface The connector is a 2...

Page 23: ...SW2 Port 3 Attention Button SW1 Port 2 Attention Button Table 2 14 Attention Buttons Miscellaneous Jumpers Headers Ref Designator Type Default Description S2 1 Switch OFF Port2 Manually operated Reten...

Page 24: ...4 12V source base on hot plug controller 2 3 Port 4 12V source from upstream port power W36 Header 2 3 Shunted 1 2 Port 4 3 3Vaux source base on hot plug controller 2 3 Port 4 3 3Vaux source from ups...

Page 25: ...tput indicator DS63 Amber Port3 Attention Output indicator DS62 Amber Port4 Attention Output indicator DS61 Amber Port5 Attention Output indicator DS57 Green Port 2 Power indicator DS56 Green Port 3 P...

Page 26: ...10 3 3Vaux 3 3V auxiliary power 3 3V 3 3V power 11 WAKE Signal for Link reactivation PERST Fundamental Reset Mechanical Key 12 RSVD Reserved GND Ground 13 GND Ground REFCLK REFCLK Reference clock 14 P...

Page 27: ...ifferential 30 RSVD Reserved PERn3 pair Lane 3 31 PRSNT2 Hot Plug presence detect GND Ground 32 GND Ground RSVD Reserved Pin Side A Side B 1 12V 12V power PRSNT1 Hot Plug presence detect 2 12V 12V pow...

Page 28: ...IDT Installation of the EB8T5A Eval Board EB8T5A Eval Board Manual 2 16 July 23 2009 EB8T5A Board Figure...

Page 29: ...configuration file into an EEPROM programmable data structure This enables the user to program an appropriate serial EEPROM with desirable register settings for the PES8T5 and then to populate that E...

Page 30: ...IDT Software for the EB8T5A Eval Board EB8T5A Eval Board Manual 3 2 July 23 2009 Notes...

Page 31: ...Notes EB8T5A Eval Board Manual 4 1 July 23 2009 Chapter 4 Schematics Schematics...

Page 32: ...N TIMING CIRCUIT POWER REGULATORS PES8T5A EPROM ATTN_SW WAKE IO EXPANDER LEDS PES8T5A CLOCK SMBUS GPIO PES8T5A DOWNSTREAM PORTS Tue Apr 15 14 25 57 2008 SHEET 1 OF 17 T Tran 2008 SCH 00162 D Huang 1 0...

Page 33: ...0 0 047UF 25V 22UF 330UF 16V 1 21K YEL YEL 10V 220UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 1 47UF 499 47UF 1K 604 499 NA 1 22UF 1 0 0 0 0 0 0 0 0 0 0 0 YEL 1K 1 YEL DNP NA DNP DNP DNP 2K DNP...

Page 34: ...1 10K 1 10K 10K 1 10K 1K 5 1K 10K 1 5 5 1 5 15 15 1K 1K 5 1K 5 1K POWER MOSFETS FOR 3 3VAUX 10K DNP 1 487 DNP 5 10K 1 10K 5 1K 5 1 1K 1 1 487 DNP 15 487 1 487 1 1 487 1 DNP 5 15 5 1 1K 1 1 DNP 15 1 1K...

Page 35: ...22 1 1 22 1 1 22 1 22 1 1 1 22 1 1 22 1 1 22 1 49 9 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 0 1UF 0 1UF 0 1UF 0 1UF 475 22 5 1 22 1 1 22 1 1 22 1 22 1 1 49 9 1 49 9 49 9 49 9 49 9 49 9 1 0 1U...

Page 36: ...SMBADDR2 SSMBADDR1 SSMBADDR5 10K 5 10K 5 10K 5 5 10K 10K 5 10K 5 5 1K 1K 5 10K 10K 5 10K 5 10K 10K 5 10K 10K 5 5 10K 1K 5 6V 5 10V 5 10K S 10K 10K 1K 5 10K 5 10K 5 10K 5 5 5 1K GRN 330 5 RESET JTAG SM...

Page 37: ...TIMING CIRCUIT APWRDISN 25V 1UF 1 10K 0 1UF 22 0 1UF 10K 5 0 1UF 0 1UF 0 1UF 5 PERSTN DIP_APWRDIS TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P N 1 1 A A B B C C D D 2 2 4 4 5 6...

Page 38: ...10K 1 10K 1 10K 10K 10K 10K 1 1 10K 5 2 7K 52 298 000 2 7K 5 MSMBCLK MSMBDAT MSMBADDR2 MSMBADDR3 5 10K 0 0 5 10K 5 5 10K S2_WAKEN EEPROM ATTN_SW WAKE MRL MSMBADDR1 5 1 1 P2ATTNIN P4ATTNIN P3ATTNIN P5...

Page 39: ...PWREN P4INTRLCK 5 2 7K P4PRDETN P2INTRLCK MSMBCLK 0 1UF P4ATTNIN P2ATTNIN P2PWRIND P2PWREN P2ATTNIND P2MRLIN P2PWRFLTN P2PRDETN IO EXPANDERS MSMBDAT MSMBCLK MSMBDAT P5PWRFLTN P5PWRIND P5PRDETN P3MRLIN...

Page 40: ...DS96 DS97 R871 R870 R869 R143 DS95 DS94 DS93 DS92 R856 R855 R854 R126 DS91 DS90 DS89 DS88 P2PRDETN P3PRDETN P4PRDETN P5PRDETN IO EXPANDER LEDS P5ATTNIND P4ATTNIND P3ATTNIND P4ATTNIN P3ATTNIN P2ATTNIN...

Page 41: ...ORT 2 3 5 10K 10K 5 10K 5 10K 10K 5 0 012 2 0 1UF 2 0 02 0 1UF 2 0 012 0 02 2 0 1UF 15 5 15 15 5 5 10V 1 10K 10K 0 0 0 0 53R 1120 000 0 01UF 0 01UF 5 10K 5 10K S2_3V S2_12V P2PWRGOODN S4_12V S4_3V P4P...

Page 42: ...20 000 0 01UF 5 5 S5_3V P3PWRFLTN P3PWRGOODN P5PWRFLTN P5PWRGOODN S3_3V S3_12V S5_12V S5_3VAUX PWR_SCL P5PWREN P3PWREN HOT SWAP CONTROL PORT 3 5 PWR_SDA 0 0 1UF MIC2592B_2YTQ 10K 5 S3_3VAUX 10K 10K YE...

Page 43: ...BADDR1 SSMBCLK SSMBADDR2 SSMBADDR3 SSMBADDR5 MSMBSMODE MSMBCLK MSMBDAT MSMBADDR1 MSMBADDR2 MSMBADDR4 MSMBADDR3 5 5 IOEXP0_INTN P2RSTN P4RSTN 10K 10K 5 5 2 7K GPEN TSTCLK1 TSTCLK0 89HPES8T5AXXBCG TITLE...

Page 44: ...F 6 8UF 25V 25V 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 89HPES8T5AXXBCG U_PETN0 U_PETN1 U_PETN2 U_PETN3 U_PETP2 U_PETP3 U_PETP0 U_PETP1 U_PERN3 U_PERP3 U_PERN2 U_PERP2 U_PERN1 U_PERP1 U_PERN0...

Page 45: ...RP0 S2_PERN0 S3_PERP0 S3_PERN0 S4_PERP0 S4_PERN0 S5_PERP0 S5_PERN0 89HPES8T5AXXBCG 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P N...

Page 46: ...P2RSTN S2_RSTN S3_3V S2_REFCLKN S2_PERN0 S2_12V S2_3V S2_3VAUX PORT 2 AND PORT 3 S3_RSTN P3PRDETN S2_RSTN S2_REFCLKP NA DNP P2PRDETN S2_WAKEN 108051 301AC S3_3VAUX S2_PERP0 P3RSTN U_PERSTN S2_PETP0 TI...

Page 47: ...LKP S5_PERP0 S5_PERN0 S5_RSTN P4RSTN S4_RSTN S5_12V S4_3V S4_WAKEN P4PRDETN P5PRDETN 0 25V 25V 10UF S4_PERN0 S4_PERP0 S4_REFCLKN S4_REFCLKP S4_RSTN 0 10UF S4_PETP0 S4_PETN0 S5_3V U_PERSTN P5RSTN TITLE...

Page 48: ...89HPES8T5AXXBCG 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF DUT_VDDPE 89HPES8T5AXXBCG 89HPES8T5AXXBCG 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF TITLE DRAWING NO...

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