IDT 9FGV1006, Register Descriptions And Programming Manual, Page: 7 / 12

7 ©2017 Integrated Device Technology, Inc. October 20, 2017
9FGV1006 Register Descriptions and Programming Guide
1
To be able to read this info you already need to know the device address.
2
These two bits show the configuration number 0~3 that will be loaded from OTP into registers at power up. When changing these bits
through I
2
C you instruct the chip to load another configuration from OTP. This is useful for switching between OTP configurations when in
I
2
C mode. This method is also used to step through each configuration for reading back OTP contents.
26 0x1A
7 1
PLL, VCO band calibration start. Toggle to 0 and back to 1 to trigger a
calibration.
The calibration engages at the moment the bit moves from 0 to 1. The
calibration finds the optimum VCO band for the current VCO frequency.
6 0
Override VCO band: 0 = use calibrated VCO band, 1 = use VCO band value
in bits [5..0].
[5..0] 100000 VCO band value. See bit 6.
27 0x1B
7 1 Enable VCO: 0 = VCO disabled, 1 = VCO enabled.
6 1 Enable charge pump: 0 = CP disabled, 1 = CP enabled.
5 1 Enable PLL bias: 0 = PLL bias disabled, 1 = PLL bias enabled.
4 1 Bypass 3
rd
pole in loop filter: 0 = use 3
rd
pole, 1 = 3
rd
pole bypassed.
[3..0] 1100 Reserved.
28 0x1C
[7..4] 1010 Loop filter R-zero value.
[3..0] 1111 Reserved.
29 0x1D [7..0] 00-hex Reserved.
30 0x1E
[7..4] 0000 Reserved.
[3..0] 1010 Charge pump current, 0 to 750 μ A with step of 50 μ A.
31 0x1F [7..0] 32-hex Reserved.
32 0x20 [7..0] 19-hex Reserved.
33 0x21 [7..0] 19-hex Integer output divider value, bits [7..0].
34 0x22
[7..4] 0000 Integer output divider value, bits [11..8].
[3..0] 0000 Reserved.
35 0x23 [7..0] 00-hex Reserved.
36 0x24 [7..0] F1-hex Reserved.
37 0x25
7 0 Reserved.
6 1 Enable Integer output divide: 0 = disabled, 1 = enabled.
5 1 Enable crystal frequency doubler: 0 = disabled, 1 = enabled.
[4..3] 01 Reserved.
2 1 Integer output divide enable: 0 = disabled, 1 = enabled.
[1..0] 01 Reserved.
Table 3. RAM Register Map (Cont.)
Register Address
Register Bit Default Function Description
Decimal Hex