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©2018 Integrated Device Technology, Inc.
March 7, 2018
9FGV1005 Register Descriptions and Programming Guide
Crystal Load Capacitance Registers
Registers 0x0E and 0x0F contain Crystal X1 and X2 Load capacitor settings that are used to add load capacitance to X1 and X2 (also
known as XIN and XOUT) respectively.
Figure 4. Crystal Oscillator Circuit
Ci1 and Ci2 are on-chip capacitors that are programmable.
Cs is stray capacitance in the PCB and Ce is external capacitors for frequency fine tuning or for achieving load capacitance values
beyond the range of the on-chip programmability. Consult the factory when adding Ce capacitors. The oscillator gain reduces with added
capacitance and there may be crystal oscillator startup issues when adding too much capacitance.
All these capacitors combined make the load capacitance for the crystal.
Capacitance on pin XIN or X1: Cx1 = Ci1 + Cs1 + Ce1.
Capacitance on pin XOUT or X2: Cx2 = Ci2 + Cs2 + Ce2.
Total Crystal Load Capacitance C
L
= Cx1 × Cx2 / (Cx1+Cx2).
For optimum balance and oscillator gain it is recommended to design Cx1 = Cx2. In that case C
L
= Cx1 / 2 = Cx2 / 2.
The capacitance per pin X1 or X2 is: Cap (pF) = 7.98 + 0.442 × Bits[5..0].
This includes an estimated Cs1 = Cs2 = 1.0pF.
When designing Cx1 = Cx2, the formula for CL is: C
L
(pF) = 3.99 + 0.221 × Bits[5..0].
The minimum C
L
value at Cx1 = Cx2 = '00 0000'-binary = 3.99pF.
The maximum C
L
value at Cx1 = Cx2 = '10 1111'-binary = 3.99 + 0.221 × 47 = 14.38pF
Example
: For a crystal C
L
of 8pF, the registers can be programmed as follows:
C
L
(pF) = 3.99 + 0.221 × 18 = 7.97pF (nearest to 8.0pF).
So for C
L
= 8pF, the recommended settings are Cx1[5..0] = Cx2[5..0] = 18 or '01 0010'-binary.
Registers 0x0E = 0x0F = 92-hex (= '1001 0010' binary).
.
R
F
G
M
R
S
X
2
X
1
Xtal O scillator
Cs
1
C i
1
Cs
2
C i
2
Ce
1
Ce
2
