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IDT 89EBPES12N3, Evaluation Board Manual

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IDT   Table of Contents

EB12N3 Eval Board Manual (18-597-001)

ii

November 2, 2006

Notes

Summary of Contents for 89EBPES12N3

Page 1: ...ilver Creek Valley Road San Jose California 95138 Telephone 800 345 7015 408 284 8200 FAX 408 284 2775 Printed in U S A 2006 Integrated Device Technology Inc IDT 89EBPES12N3 Evaluation Board Manual Ev...

Page 2: ...ure Analysis be performed LIFE SUPPORT POLICY Integrated Device Technology s products are not authorized for use as critical components in life support devices or systems unless a specific written agr...

Page 3: ...ination Voltage Regulator 2 4 PCI Express Digital Power Voltage Regulator 2 4 PCI Express Analog Power Voltage Regulator 2 4 Core Logic Voltage Regulator 2 4 Required Jumpers 2 4 Power Selection for D...

Page 4: ...IDT Table of Contents EB12N3 Eval Board Manual 18 597 001 ii November 2 2006 Notes...

Page 5: ...t Selection for Warm Reset 2 6 Table 2 9 Downstream Reset Selection 2 7 Table 2 10 Boot Configuration Vector Signals 2 7 Table 2 11 Boot Configuration Vector Switches 2 8 Table 2 12 Slave SMBus Interf...

Page 6: ...IDT List of Tables EB12N3 Eval Board Manual 18 597 001 iv November 2 2006 Notes...

Page 7: ...Notes EB12N3 Eval Board Manual 18 597 001 iii November 2 2006 List of Figures Figure 1 1 Functional Block Diagram of the EB12N3 Eval Board 1 1 Figure 2 1 SuperMicro X6DH8 G2 Motherboard 2 2...

Page 8: ...IDT List of Figures EB12N3 Eval Board Manual 18 597 001 iv November 2 2006 Notes...

Page 9: ...e EB12N3 eval board is designed to function as an add on card to be plugged into a x4 PCIe slot available on a motherboard hosting an appro priate root complex and microprocessor s The EB12N3 is a veh...

Page 10: ...tates testing with two different settings of initialization data with a simple change of a jumper Only one EEPROM can be selectively connected to the SMBUS at a time Attention button for each port to...

Page 11: ...Revision History EB12N3 Eval Board Manual 18 597 001 1 3 November 2 2006 Notes Revision History September 26 2006 Initial publication of board manual November 2 2006 Added footnote to Table 2 10 regar...

Page 12: ...IDT Description of the EB12N3 Eval Board Revision History EB12N3 Eval Board Manual 18 597 001 1 4 November 2 2006 Notes...

Page 13: ...rage It provides fan out and switching functions between a PCI Express upstream port and two down stream ports or peer to peer switching between downstream ports The PES12N3 has two PCI Express x4 dow...

Page 14: ...IDT Installation of the EB12N3 Eval Board Hardware Description EB12N3 Eval Board Manual 18 597 001 2 2 November 2 2006 Notes Figure 2 1 SuperMicro X6DH8 G2 Motherboard...

Page 15: ...ncy to spread the peak energy over a wider bandwidth The output of the onboard clock generator is accessible through two SMA connectors located on the Evaluation Board See Table 2 4 This can be used t...

Page 16: ...o the EB12N3 as described in Table 2 5 The 5V is unused PCI Express Serial Data Transmit Termination Voltage Regulator A low voltage low dropout regulator Micrel MIC49300BR provides a 1 5V PCI Express...

Page 17: ...wer to down stream port C Open Downstream port C power will be controlled by power enable signal Refer to schematic page 5 C7 W11 Header Shunted Shunted Hot Plug disabled enables direct power to down...

Page 18: ...undamental reset There is also a software controlled reset for each downstream port through the GPIO pins Finally there is a pgood controlled reset for each downstream port When hot plugging is enable...

Page 19: ...n the PB_PCIELSTS or PC_PCIELSTS register Default 0x1 CCLKUS Common Clock Upstream The assertion of this pin indicates that the upstream port is using the same clock source as the upstream device This...

Page 20: ...witch operating mode Default1 0x0 0x0 Initialization without serial EEPROM 0x1 Serial EEPROM based initialization 0x2 through 0x5 Reserved 0x6 Scan test mode factory use only 0x7 PLL Bypass test mode...

Page 21: ...CI Express connector is optional and may not be present on the host system On the PES12N3 board the slave SMBus interface is accessible through the PCI Express edge connector as well as a 4 pin header...

Page 22: ...e lower three bits of the bus address for the I O expander device is 0b000 by default and is configurable using the jumpers W29 W30 and W31 as described in Table 2 16 4 0 5 SSMBUSADDR 5 6 1 7 1 SMBUS...

Page 23: ...ON 0b0100 100 ON OFF OFF 0b0100 011 ON OFF ON 0b0100 010 ON ON OFF 0b0100 001 ON ON ON 0b0100 000 Default Table 2 15 I O Expander Address Setting EEPROM SMBus Address Setting W21 W17 W15 Bus Address O...

Page 24: ...k to the user A description of each is provided in Table 2 20 JTAG Connector J4 Pin Signal Direction Pin Signal Direction 1 TRST Test reset Input 2 GND 3 TDI Test data Input 4 GND 5 TDO Test data Outp...

Page 25: ...ect 9 JTAG1 TRST Test Reset resets JTAG i f 3 3V 3 3V power 10 3 3Vaux 3 3V auxiliary power 3 3V 3 3V power 11 WAKE Signal for Link reactivation PERST Fundamental Reset Mechanical Key 12 RSVD Reserved...

Page 26: ...ND Ground PERp4 Receiver differential 36 GND Ground PERn4 pair Lane 4 37 PETp5 Transmitter differential GND Ground 38 PETn5 pair Lane 5 GND Ground 39 GND Ground PERp5 Receiver differential 40 GND Grou...

Page 27: ...IDT Installation of the EB12N3 Eval Board Locations of Connectors Jumpers and Switches EB12N3 Eval Board Manual 18 597 001 2 15 November 2 2006 Notes Locations of Connectors Jumpers and Switches...

Page 28: ...IDT Installation of the EB12N3 Eval Board Locations of Connectors Jumpers and Switches EB12N3 Eval Board Manual 18 597 001 2 16 November 2 2006 Notes...

Page 29: ...values in specific registers A conversion utility is provided to translate the configuration file into an EEPROM programmable data structure This enables the user to program an appropriate serial EEP...

Page 30: ...IDT Software for the EB12N3 Eval Board Device Management Software EB12N3 Eval Board Manual 18 597 001 3 2 November 2 2006 Notes...

Page 31: ...Notes EB12N3 Eval Board Manual 18 597 001 4 1 November 2 2006 Chapter 4 Schematics Schematics...

Page 32: ...RIPTION 6 PCIE CONNECTORS DOWNSTREAM Thu Sep 07 22 55 09 2006 B K LEUNG 2006 STGSCH 00088 B OH 1 0 SHEET 1 OF 10 18 597 001 89EBPES12N3 CR 1 TEST4_LIB 89EBPES12N3 SCH_1 PAGE1 STGC 0087R01 1 0 89EBPES1...

Page 33: ...0603 1UF 25V 0603 S PAK 5 0805 215 1UF 16V 10UF 16V S PAK 5 16V 1UF 10UF 16V 0805 215 16V 1 16V 0603 100 1 10UF 16V 0805 1 24 9 1UF 16V 10UF 1UF 10UF 10K 16V 16V 10UF 24 9 0805 1 1 S PAK 5 215 16V 10U...

Page 34: ...3 0 1UF 0 1UF 0402 0 1UF 0 1UF 0 1UF 33 33 33 33 33 33 475 33 33 33 33 33 6C5 6C5 6C1 6C1 9D7 49 9 CONNSMA 25V 25MHZ ADOHL 25 000M 10A6 33 10K 10K 10K 10K DIP16_300 SSC_SS1 SSC_SS0 SSC_S1 SSC_S0 49 9...

Page 35: ...9D7 9D7 9B4 2 7K 2 7K 6C8 6C8 4D3 10K PBAPN PBINTRLCK B_PRSNT2 PBAIN PBPIN 5C7 4C8 4C8 9B8 9B8 6B8 5C7 4A4 E_MSMBADDR0 E_MSMBADDR1 E_MSMBADDR2 4D3 4D3 E_SDA E_SCL 9B8 9B8 9C8 2 7K 2 7K 2 7K PDIP8 2 7K...

Page 36: ...K 10K 10K 0 1UF 6C8 10K 10K 0 1UF 330 RED 0 1UF 330 0 01UF 0 0 15 0 013 6800PF 22NF 0603 0 020 15 22NF 0603 0 1UF 6800PF 0603 0603 22NF 0 020 0603 15 0 013 6D7 6D8 6D3 6D4 HOT PLUG CONTROLLER 0 110K 1...

Page 37: ...2 B_PETP2 B_PERP0 B_PETN0 B_WAKE 9C4 5D1 6C8 6C8 6C4 4B7 7C7 9B8 3C5 4B7 7C7 9B8 3C5 E_SSMBDATA E_SSMBCLK 4B7 7C7 9B8 3C1 9C4 5A1 5B1 5A1 5D1 5C1 10B3 9A1 9A1 9A1 9A1 9A1 9A4 9A4 9A4 9A4 9B4 9B4 9B4 3...

Page 38: ...CONNECTOR U S 9D4 10UF 16V 16V 9D1 9D1 9D1 9D1 16V 10UF 9D4 9D4 9D4 9D4 0 E_SSMBDATA 10B1 0 9B8 4B7 E_SSMBCLK 9D4 9D4 6C8 U_WAKE 6C4 U_PETN1 U_PETN0 PERST 8 3 8 7 7 6 6 5 4 4 2 2 D D C C B B A A 1 5...

Page 39: ...0 1UF 0402 0402 0 1UF 0402 0402 0 1UF 0402 0402 0 1UF 0402 0 1UF 47UF 10V 10V 47UF 0 1UF 0 1UF 0402 0402 HDR_1X2_100 0402 0 1UF 0402 0 1UF 0 1UF 0402 0 1UF 0402 16V 1UF 0402 0 1UF 120OHM 0805 120OHM...

Page 40: ...6C5 6C5 4B4 6B1 6B1 6B1 6B1 6B1 6C1 4B4 GREEN YEL 9C6 E_A_ATTN_IND E_A_PWR_IND 4B4 7B6 7B6 7C6 7B6 7B6 7B6 7B6 330 9C5 330 10K 10K 9B8 4A8 4A8 4A8 4A8 TSTCLK1 TSTCLK0 E_A_PWR_IND E_A_ATTN_IND E_A_ATT...

Page 41: ...0402 5 10K 5 SO8 47UF 10V 10K 10K 10V 47UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF SO8 9D7 2D2 6C5 B_PERST 6C4 6C8 10K 5 0 0402 10K C_WAKE 7C6 U_WAKE...

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