IDT Installation of the EB12N3 Eval Board
SMBus Interfaces
EB12N3 Eval Board Manual (18-597-001)
2 - 10
November 2, 2006
Notes
The slave SMBus interface responds to the following SMBus transactions initiated by an SMBus master.
Initiation of any SMBus transaction other than those listed above to the slave SMBus interface produces
undefined results. See the SMBus 2.0 specification for a detailed description of these transactions:
–
Byte and Word Write/Read
–
Block Write/Read
SMBus Master Interface
Connected to the master SMBus interface is a 16-bit I/O Expander (PCA9555) and a serial EEPROM
(24LC512). The I/O expander is used as an interface for the onboard dual-slot hot-plug controller
(MIC2591B). The lower three bits of the bus address for the I/O expander device is
0b000
by default and
is configurable using the jumpers W29, W30, and W31 as described in Table 2.16.
4
0
5
SSMBUSADDR[5]
6
1
7
1
SMBUS Slave Interface Address Setting
W1
SSMBADDR[5]
W5
SSMBADDR[3]
W2
SSMBADDR[2]
W3
SSMBADDR[1]
Slave Interface
Bus Address
OFF
OFF
OFF
OFF
0b1110111 (Default)
OFF
OFF
OFF
ON
0b1110110
OFF
OFF
ON
OFF
0b1110101
OFF
OFF
ON
ON
0b1110100
OFF
ON
OFF
OFF
0b1110011
OFF
ON
OFF
ON
0b1110010
OFF
ON
ON
OFF
0b1110001
OFF
ON
ON
ON
0b1110000
ON
OFF
OFF
OFF
0b1100111
ON
OFF
OFF
ON
0b1100110
ON
OFF
ON
OFF
0b1100101
ON
OFF
ON
ON
0b1100100
ON
ON
OFF
OFF
0b1100011
ON
ON
OFF
ON
0b1100010
ON
ON
ON
OFF
0b1100001
ON
ON
ON
ON
0b1100000
Table 2.14 PES12N3 SMBus Slave Interface Address Setting
Slave Interface Address Configuration
Address Bit
Signal
Table 2.13 SMBus Slave Interface Address Configuration (Part 2 of 2)
Summary of Contents for 89EBPES12N3
Page 4: ...IDT Table of Contents EB12N3 Eval Board Manual 18 597 001 ii November 2 2006 Notes...
Page 6: ...IDT List of Tables EB12N3 Eval Board Manual 18 597 001 iv November 2 2006 Notes...
Page 8: ...IDT List of Figures EB12N3 Eval Board Manual 18 597 001 iv November 2 2006 Notes...
Page 31: ...Notes EB12N3 Eval Board Manual 18 597 001 4 1 November 2 2006 Chapter 4 Schematics Schematics...
