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PIO-D64/PIO-
D64U User’s Manual ( Ver.1.
6, Mar. 2015, PMH-007-16 ) ----- 2
Tables of Contents
Introduction............................................................................... 5
Product options....................................................................... 8
Hardware configuration ........................................................... 9
Board Layout .................................................................................... 9
I/O Port Location ............................................................................. 10
Pin Assignments .............................................................................. 10
I/O Operation ................................................................................... 12
DO Port Architecture (CN1 & CN3)....................................... 12
DI Port Architecture (CN2 & CN4)......................................... 13
Timer/ Counter Architecture ............................................................ 14
Clock source .................................................................................... 16
Interrupt Operation .......................................................................... 17
Interrupt Block Diagram of PIO-D64/PIO-D64U.................... 18
INT_CHAN_0........................................................................ 19
INT_CHAN_1........................................................................ 20
INT_CHAN_2........................................................................ 21
Daughter Boards ............................................................................. 22
DB-16P Isolated Input Board.................................................22
DB-16R Relay Board............................................................. 23
DB-24PRD, DB-24POR, DB-24C.......................................... 24
Daughter Board Comparison Table.......................................25
I/O Control Register ................................................................ 26
How to Find the I/O Address............................................................ 26
The Assignment of I/O Address ....................................................... 28
The I/O Address Map ...................................................................... 30
RESET\ ControlRegister.......................................................31
AUX Control Register............................................................ 31
AUX data Register.................................................................31
INT Mask Control Register.................................................... 32
Aux Status Register.............................................................. 33
Interrupt Polarity Control Register......................................... 33
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