PIO-D64/PIO-
D64U User’s Manual ( Ver.1.
6, Mar. 2015, PMH-007-16 ) ----- 14
2.5 Timer/ Counter Architecture
PIO-D64/PIO-D64U has two timer/counter chips, 8254. The first 8254 chip is
used as general purpose timer/counter, as shown in Figure 2.4. The pin
assignment is presented in Sec.2.3.
Figure 2.4
The second 8254 chip is used to generate interrupt trigger signals, as
shown in Figure 2.5. The Counter3 accept event signal and will generate trigger
signal of the interrupt. And the Counter4 and Counter5 are cascaded together,
which has clock source 4 MHz. It is used to generate pacer timer trigger of the
interrupt.
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