4 - 1
SECTION 4
CIRCUIT DESCRIPTION
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (RF UNIT)
Received signals from the antenna connector are passed
through the low-pass filter (L5, L6, C8–C12). The filtered sig-
nals are applied to the
λ
⁄
4
type antenna switching circuit
(D101, D102, L4, L206, C209, C210). The passed signals
are then applied to the RF amplifier circuit.
The antenna switching circuit functions as a low-pass filter
while receiving. However, its impedance becomes very high
while D101 and D102 are turned ON (while transmitting).
Thus transmit signals are blocked from entering the receiv-
er circuits. The passed signals are then applied to the RF
amplifier circuit.
4-1-2 RF CIRCUIT (RF UNIT)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit are amplified
at the RF amplifier (Q3) and passed through the bandpass
filter (FI1) to suppress out-of-band signals. The filtered sig-
nals are applied to the 1st mixer circuit.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS (RF UNIT)
The 1st mixer circuit converts the received signals to a fixed
frequency of the 1st IF signal with a PLL output frequency.
By changing the PLL frequency, only desired signals will
pass through a crystal filter at the next stage of the 1st mixer.
The signals from the bandpass filter (FI1) are mixed at the
1st mixer circuit (Q2) with a 1st LO signal coming from the
VCO circuit to produce a 21.7 MHz 1st IF signal.
The 1st IF signal is applied to a crystal filter (FI2) to sup-
press out-of-band signals. The filtered 1st IF signal is
applied to the IF amplifier (Q1), then applied to the 2nd
mixer circuit.
4-1-4 2ND MIXER AND DEMODULATOR CIRCUITS
(RF UNIT)
The 2nd mixer circuit converts the 1st IF signal into a 2nd IF
signal. A double conversion superheterodyne system (which
converts receive signals twice) improves the image rejection
ratio and obtains stable receiver gain.
The 1st IF signal from the IF amplifier (Q1) is applied to the
2nd mixer section in the FM IF IC (IC2, pin 16), and is mixed
with the 2nd LO signal to be converted into a 450 kHz 2nd
IF signal.
The FM IF IC contains a 2nd mixer, quadrature detector,
noise amplifier and a limiter amplifier, etc. The PLL refer-
ence oscillator (X1) is used for the 2nd LO signal via the PLL
IC (IC1, pins 16, 17), and is applied to pin 1 of the FM IF IC
(IC2).
The mixed 2nd IF signal is output from pin 3 (IC2) and
passed through the ceramic bandpass filter (FI3) to remove
unwanted heterodyne frequencies. It is then amplified at the
limiter amplifier section (IC2, pin 5) and applied to the quad-
rature detector section (IC2, pins 10, 11) to demodulate the
2nd IF signal into AF signals.
4-1-5 AF CIRCUIT (RF AND MAIN UNITS)
AF signals from the FM IF IC (RF unit; IC2, pin 9) are
passed through the high-pass filter (RF unit; Q15, Q16) to
remove CTCSS signals then applied to the MAIN unit via J2
(pin 10) as the “VOL” signal.
The “VOL” signal (AF signals) from the RF unit is applied to
the [VOL] control (MAIN unit; R58) to control the audio level
via the volume mute switch (Q23). The level controlled AF
signals are applied to the AF power amplifier (IC9, pin 2) to
drive an internal speaker (SP1) via the [SP] jack (J1).
• 2nd IF and demodulator circuits
Mixer
16
Limiter
amp.
2nd IF filter
450 kHz
PLL IC
IC1
X1
21.25 MHz
X2
(21.25 MHz)
RSSI
IC2 TA31136FN
14
1st IF (21.7 MHz)
from Q1
"SQL" signal to the CPU pin 59
11
10
9
8
7
5
3
AF signal "AF"
R+3
1
17
16
Active
filter
FI3
Noise
detector
FM
detector
