4 - 2
4-1-6 SQUELCH CIRCUIT (RF AND MAIN UNITS)
• NOISE SQUELCH
The noise squelch circuit cuts out AF signals when no RF
signals are received. By detecting noise components in the
AF signals, the squelch circuit switches the AF mute switch.
A portion of the AF signals from the FM IF IC (RF unit; IC2,
pin 9) are applied to the active filter section (RF unit; IC2,
pin 8). The active filter section amplifies and filters noise
components. The filtered signals are applied to the noise
detector section and output from pin 14 as the “SQL” signal.
The “SQL” signal from IC2 (pin14) is applied to the CPU
(MAIN unit; IC1, pin 59). The CPU analyzes the noise con-
dition and outputs the “RMUT” and “AFON” signals to toggle
the volume mute (MAIN unit; Q23) and AF mute (MAIN unit;
Q5, Q10, Q11) switches.
• TONE SQUELCH
The tone squelch circuit detects AF signals and opens the
squelch only when receiving signal containing a matching
subaudible tone (CTCSS). When tone squelch is in use, and
a signal with a mismatched or no subaudible tone is
received, the tone squelch circuit mutes the AF signals even
when noise squelch is open.
A portion of the AF signals from the FM IF IC (RF unit; IC2,
pin 9) passes through the tone low-pass filter (MAIN unit;
Q7, Q12) to remove AF (voice) signals and is applied to the
CTCSS decoder inside the CPU (MAIN unit; IC1, pin 58) via
the “CTCIN” line to control the volume mute and AF mute
switches.
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(MAIN UNIT)
The microphone amplifier circuit amplifies audio signals with
pre-emphasis characteristics from the microphone to a level
needed for the modulation circuit.
AF signals from the internal/external microphone are applied
to the microphone amplifier circuit (IC2b) via the microphone
mute switch (Q6) and pre-emphasis circuit (R7, C24). The
amplified signals are passed through the splatter filter (IC2a)
and applied to the modulation circuit in the RF unit via J4
(pin 6) as the MOD signal.
4-2-2 MODULATION CIRCUIT (RF UNIT)
The modulation circuit modulates the VCO oscillating signal
(RF signal) using the microphone AF signals.
The filtered audio signals from the MAIN unit are passed
through the deviation adjustment pot (R50), and are then
applied to the modulation circuit (D4, D5) to modulate trans-
mit signals at the VCO circuit (Q6).
The modulated signal is applied to the drive amplifier circuit.
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
(RF UNIT)
The amplifier circuit amplifies the VCO oscillating signal to
the output power level.
The signal from the buffer amplifiers (Q7, Q203) is passed
through the Tx/Rx switching circuit (D2), and are amplified at
the pre-drive (Q8) and drive (Q201) amplifiers. The amplified
signal is power-amplified at the power amplifier (Q202) to
obtain 500 mW of RF power
The amplified transmit signal is passed through the antenna
switching circuit (D7) and low-pass filter, and is then applied
to the antenna.
4-3 PLL CIRCUITS (RF UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and receive 1st LO frequency. The PLL output com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by
the divided ratio (N-data) of a programmable divider.
The PLL circuit consists of the VCO circuit (Q6). An oscillat-
ed signal from the VCO passes through the buffer amplifier
(Q7), and is then applied to the PLL IC (IC1, pin19) and
prescaled in the PLL IC based on the divided ratio (N-data).
The reference signal is generated at the reference oscillator
(X1) and is applied to the PLL IC. The PLL IC detects the
out-of-step phase using the reference frequency and out-
puts it from pin 13 (IC1). The output signal is passed through
the loop filter (R45, C68) and is then applied to the VCO cir-
cuit as the lock voltage.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
• PLL circuit
Shift register
Prescaler
Phase
detector
Loop
filter
Programmable
counter
Programmable
divider
X1
21.25 MHz
to the FM IF IC
VCO
Buffer
Q7
3
4
5
STB
IC1 (PLL IC)
CK
DATA
to transmitter circuit
to 1st mixer circuit
D2
D1
17
16
14
19
Q6, D4, D5
Buffer
Q203
