4 - 5
4-6 CPU PORT ALLOCATION
Pin
No.
LINE
NAME
DESCRIPTION
I/O
1
KR0
Key matrix.
I
2
PCON
+3V line SW
"L"=Power ON
O
3
TCON
Tone fi lter (L: IC12) SW
"L"=Filter activated.
O
4–7
KS0–KS3
Key matrix.
I
8
TREBLE_B
Tone control circuit SW.
"H"=Treble-B
O
9
BASS_B
Tone control circuit SW.
"H"=Bass-B
O
10
ESIO
EEPROM data I/O.
I/O
11
ECK
EEPROM clock.
O
13
TREBLE_C
Tone control circuit SW.
"H"=Treble-C
O
15
BASS_C
Tone control circuit SW.
"H"=Bass-C
O
16
TRUTH
AF fi lter (L: Q20) by-pass SW.
"H"=FM mode.
O
17
SHIFT
RX frequency shift.
"L"=200 MHz RX.
O
18
LCK
DAC (L: IC16) clock.
O
19
AM
AF line SW (M: IC9) control.
"L"=Receiving in AM mode.
O
20
AGCC
AGC function switching.
"L"=AGC activated.
O
21
WFM
RX mode switching (phase shifter
switching; discriminator/LC resonator).
"H"= WFM mode.
O
22
ANTSW
AM broadcast antenna switching.
"L"=Internal bar antenna.
O
23
B2C
RF circuit (BC band) control.
"L"=BC band RX (Ext. LOCAL antenna).
O
24
B1C
RF circuit (SW band) control.
"L"=SW band RX (Ext. DX antenna).
O
25
ATT
Attenuator (M: D2, R2 to 4) control.
"L"=Attenuator ON.
O
26
NOISE
Detected noise level (D/A value).
I
27
800MC
RF circuit (800 MHz band) control.
"L"=800 MHz band RX.
O
28
GC
RF circuit (1 GHz band) control.
"L"=1 GHz band RX.
O
29
UHFC
RF circuit (UHF band) control.
"L"=UHF band RX.
O
30
EAR
Earphone antenna control.
"L"=Earphone antenna activated.
O
34
DUD
[DIAL] (rotary encoder; L S21)
I
35
DCK
[DIAL] (rotary encoder; L S21)
I
36
LDATA
DAC (L: IC16) data.
I
37
CKO
CPU clock signal to converter (L: IC11,
D24–27).
O
38
POWER
[POWER] key.
I
39
DATAC
Common data to the buffer (L: IC1).
O
40
LIGHT
LCD backlight driver (L: Q5) control.
"H"=Backlight (L: DS10 to 12) ON.
O
41
AFON
AF power AMP SW (L: Q11, 12) control.
"H"=AF power AMP (L: IC9) ON.
O
44
BEEP
Beep sounds (square waves).
I
45
RSSI
RSSI voltage (A/D value).
I
46
RTONE
Demodulated tone signals.
I
Pin
No.
LINE
NAME
DESCRIPTION
I/O
47
CTONE
Demodulated tone signals.
I
48
VSCAF
Filtered demodulated signal (extracted
voice signal).
I
49
CHG
Charge status.
"H"=While pre/fast charging.
I
50
TEMP
Internal temparature according divided
voltage by thermister (L: R189)
I
51
BATTI
Battery voltage input (AD value).
I
52
HVIN
DC input voltage monitor (divided
voltage of HV line).
I
59
RESET
CPU reset signal.
I
70
CPU
CLOCK
SHIFT
CPU clock frequency shift.
O
71
VCO1
VCO switching signal.
"L"= VCO1 activated (=receiving
510–
741 MHz
).
O
72
VCO2
VCO switching signal.
"L"= VCO1 activated (=receiving
283–
510 MHz/1130–1368 MHz
).
O
73
VCO3
VCO switching signal.
"L"= VCO1 activated (=receiving
83.5–
283 MHz/950–1130 MHz
).
O
74
VCO4
VCO switching signal.
"L"= VCO1 activated (=receiving
0.15–
83.5 MHz/741–950 MHz
).
O
75
BDET
Battery pack attachment detect.
"L"=Battery pack is attached.
I
76
LCDDT
Serial data to the LCD (L: DS13).
O
77
LCDCS
Serial data to the LCD (L: DS13).
O
78
LCDCK
Serial clock to the LCD (L: DS13).
O
79
CL_OUT
Cloning data.
O
80
CL_IN
Cloning data.
I
83
DASTB
Strobe to the DAC (L: IC16).
O
84
VRSTB
Strobe to the VR IC (L: IC10).
O
85
PCK
PLL clock.
O
86
PLDATA
PLL data.
O
87
PSTB1
PLL (1st VCO UNIT; IC3) strobe.
O
88
PSTB2
PLL (2ND VCO UNIT; IC1) strobe.
O
89
PS
Power save mode control for PLL IC.
"L"=While in power save mode.
O
90
CHGC
Charge management IC (L: IC18) control.
"H"=While charging.
O
91
HVDET
HV line voltage detect.
"H"=3 V is applied.
I
92
CL_IN
Cloning data.
I
93
VHF_C
RF circuit (VHF band) control.
"L"=VHF band RX.
O
94
HFC
RF circuit (HF band) control.
"L"=HF band RX.
O
95
R3C
R3V line SW. (regurator (L: IC4) control
signal)
"H"= R3V line is ON. (the regulator is
enable)
O
96–
100
KR5–KR1
Key matrix.
I
Summary of Contents for IC-RX7
Page 1: ...SERVICE MANUAL ADDENDUM CONTENTS PARTS LIST 1 BOARD LAYOUTS 8 VOLTAGE DIAGRAM 10 Feb 2010...
Page 16: ...SERVICE MANUAL ADDENDUM CONTENTS REPLACEMENT PAGE 6 1 PARTS LIST 1 VOLTAGE DIAGRAM 8 Feb 2009...
Page 30: ...S 14510XZ C1 Aug 2008 WIDEBAND RECEIVER...
Page 64: ...1 1 32 Kamiminami Hirano ku Osaka 547 0003 Japan S 14510XZ C1 2008 Icom Inc...