4 - 3
4-3 PLL CIRCUITS
4-3-1 VCO CIRCUIT
The VCO (Q21, Q22, D21−D23) generates the both of trans-
mit signal and LO signals for the 1st IF conversion. The VCO
output signals are buffer-amplified by Q23 and Q24.
While transmitting, the VCO output signal is applied to the
transmit amplifiers via TX/RX switch (D50 is ON, D51 is OFF).
While receiving, the VCO output signals are applied to the 1st
mixer (Q150) via the TX/RX switch (D50 is OFF, D51 is ON)
the BPF (L26, C122, C123, C130, C131), to be mixed with
the received signals to produce the 21.7 MHz 1st IF signal.
A portion of the VCO output is applied to the PLL IC (IC1,
pin 19) via the buffer amplifier (Q25) and LPF (L20, R20,
C20−C22).
4-3-2 PLL CIRCUIT
The PLL circuit provides stable oscillation of the transmit
frequency and receive 1st LO frequency. The PLL output
frequency is controlled by the divided ratio (N-data) from the CPU.
The buffer-amplified signals from the LPF (L20, R20, C20
−C22) are applied to the PLL IC (IC1, pin 8). The applied
signals are divided at the prescaler and programmable
counter according to the “SDATA (SDATAO)” signal from the
CPU (IC360, pin 10). The divided signal is phase-compared
with the reference frequency signal which is divided by
reference counter, at the phase detector.
The phase difference is output from pin 5 as a pulse type
signal after being passed through the charge pump. The
output signal is converted into the DC voltage (lock voltage) by
passed through the loop filter (R8−R10, R22, C10, C11, C24,
C25). The lock voltage is applied to the variable capacitors (D22,
D23) of the VCO (Q21, Q22, D21−D23) and locked to keep
the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
DATA interface
Prescaler
Phase
detector
Loop
filter
Reference
counter
Programmable
counter
Charge
pump
Buffer
Q23
Buffer
Q24
Buffer
Q25
to the TX/RX switch (D50, D51)
Q22, Q37, D21–D23
VCO
LPF
to the FM IF IC (IC170, pin 2)
11
5
14
8
1
2
“PLSTB”
“UNLK”
• PLL CIRCUITS
“SCK”
“SDATA”
X1
9
10
PLL IC (IC1)
LPF
Line
name
Description
VCC
The same voltage as attached battery pack.
CPU5V
Common 5 V converted from VCC line at the
CPU5V regulator (IC220).
The converted voltage is applied to the CPU
(IC360), Reset IC (IC341), EEPROM (IC340), etc.
5V
Common 5 V converted from VCC line at the 5V
regulator (Q223−Q225) controlled by "5VS" signal
from CPU (IC360, pin 86).
The converted voltage is applied to the backlight
LED'S (DS240−DS243, DS250−DS253), D/A con-
verter (IC190), PLL IC (IC1), etc.
4-4 POWER SUPPLY CIRCUITS
Line
name
Description
V5V
Common 5 V converted from VCC line at the V5V
regulator (Q220).
The converted voltage is applied to the VCO (Q21,
Q22, D21−D23)
R5V
Receive 5 V controlled by R5V regulator (Q221) us-
ing "R5VS" signal from the CPU (IC360, pin 89).
The voltage is applied to the receive circuits (1st
mixer (Q150), 1st IF amplifier (Q151), RF amplifier
(Q90), etc.).
T5V
Transmit 5 V controlled by T5V regulator (Q222)
using "T5VS" signal from the CPU (IC360, pin 86).
The controlled voltage is applied to the transmit
circuits (differential amplifier (IC50), pre-driver
(Q53), power amplifier (Q54), microphone ampli-
fi er (IC200), etc.).
