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4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(LOGIC AND RF UNITS)
The microphone amplifier circuit amplifies audio signals with
+6 dB/octave pre-emphasis characteristics from the micro-
phone to a level needed for the modulation circuit.
AF signal from the internal/external microphone are applied
to the microhone amplifier (LOGIC unit; IC9, pin 9) via the
modulation depth adjustment pot (LOGIC unit; R41). The
amplified signals are applied to the AF amplifier (RF unit;
IC510, pin 6) and low-pass filter (RF unit; IC510, pin 3) after
being passed through the voice rec/play IC (LOGIC unit;
IC15). The filtered signals are applied to the modulation cir-
cuit.
4-2-2 MODULATION CIRCUIT (RF UNIT)
The modulation circuit modulates the TX LO signal from the
VCO (RF signal) using the microphone audio signal.
While in transmission, the LO signal from the VCO circuit
(Q31, Q32, D24) is amplified at the buffer amplifiers (Q30,
Q27, Q28) and passed through the LO switch (D17). This
signal is then applied to the AM modulator (D5).
The buffer amplifier (q6) amplifies the LO signal with a gain
controlled by an AF signal to make low level modulation.
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
(RF UNIT)
The drive amplifier circuit amplifies the transmit signal to a
level needed for the power amplifier circuit. The power
amplifier circuit amplifies this to obtain a specified transmit
output power.
The modulated RF signal from the buffer amplifier (Q6) is
applied to the pre-drive amplifier (Q4) after being passed
through the ALC attenuator (D4). The signal is amplified at
the YGR (Q3) and power amplifier (Q2) to obtain 5 W of RF
power (at 9.6 V DC). The amplified signal passes through
the low-pass filter (L5, C11–C16). The filtered signal is
applied to the antenna connector (CHASSIS unit; J1) via the
antenna swtich (D1) and low-pass filter (L1–L3, C3–C7).
4-2-4 ALC CIRCUIT (RF UNIT)
The ALC (Automatic Level Control) circuit protects the drive
and power amplifiers from mismatched output loads, and
selects HIGH or LOW output power.
The power detector circuit (D2, D3) detects forward and
reflection signals respectively. The combined voltage is at a
minimum level when the antenna is matched at 50
Ω
and is
increased when it is mismatched.
The detected voltage is amplified at the ALC amplifier (Q5)
after being passed through the ALC controller (Q1). The
amplified signal is applied to the ALC attenuator (D4) to
obtain stabilized output power.
When the antenna impedance is mismatched, the detected
voltage exceeds the reference voltage. Thus, the bias volt-
age of the pre-driver is decreased.
4 - 4
R11
T+5
PWR
DET
D2, D3
"RFDET" signal to the CPU
(LOGIC unit; IC1, pin 4)
LPF
Q2
Power
amplifier
VCC
Q3
Q4
YGR
amplifier
VCC
T+5
Pre-drive
D4
ALC
ATT
ALC
amplifier
R25
R26
C38
Q5
C38
TX signal from the
buffer amplifier (Q6)
To the antenna
Q1
From the D/A converter
(IC4, pin 6)
C37
R24
R23
• ALC CIRCUIT