2-8 Hardware Installation
2.12 Watch-Dog Timer
There are three access cycles of Watch -Dog Timer as Enable, Refresh and Disable.
The Enable cycle should proceed by READ PORT 443H. The Disable cycle
should proceed by READ PORT 043H. A continue Enable cycle after a first
Enable cycle means Refresh.
Once if the Enable cycle activity, a Refresh cycle is request before the time-out
period for restart counting the WDT Timer's period. Otherwise, it will assume
that the program operation is abnormal when the time counting over the period
preset of WDT Timer. A System Reset signal to start again or a NMI cycle to the
CPU comes if over.
The JP5 is using for select the active function of watch -dog timer in disable the
watch -dog timer, or presetting the watch -dog timer activity at the reset trigger, or
presetting the watch -dog timer activity at the NMI trigger.
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JP5 : Watch-Dog Active Type Setting
JP5
DESCRIPTION
*1-2
System Reset
2-3
Active NMI
OFF
disable Watch -dog timer
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JP6 : WDT Time - Out Period
PERIOD
1-2
3-4
5-6
7-8
*1 sec
OFF
OFF
ON
OFF
2 sec
OFF
OFF
ON
ON
10 sec
OFF
ON
OFF
OFF
20 sec
OFF
ON
OFF
ON
110 sec
ON
OFF
OFF
OFF
220 sec
ON
OFF
OFF
ON
The Watch -dog timer is disabled after the system Power-On. The watch -dog
timer can be enabled by a Enable cycle with reading the control port (443H), a
Refresh cycle with reading the control port (443H) and a Disable cycle by reading
the Watch -dog timer disable control port (043H). After a Enable cycle of WDT,
user must constantly proceed a Refresh cycle to WDT before its period setting
comes ending of every 1, 2, 10, 20, 110 or 120 seconds which pre-setting by JP6.
