ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
³
A l t e r n a t e S t a t u s R e g i s t e r
³
ÃÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄ´
³
7
³
6
³
5
³
4
³
3
³
2
³
1
³
0
³
³
B S Y
³
R D Y
³
D F
³
D S C
³
D R Q
³
C O R
³
I D X
³
E R R
³
ÀÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÙ
Figure 51. Alternate Status Register
This register contains the same information as the Status Register. The only difference is that reading this
register does not imply interrupt acknowledge or clear a pending interrupt. See 9.13, “Status Register” on
page 71 for the definition of the bits in this register.
9.2 Command Register
This register contains the command code being sent to the device. Command execution begins immediately
after this register is written. The command set is shown in Figure 68 on page 103.
All other registers required for the command must be set up before writing the Command Register.
9.3 Cylinder High Register
This register contains the high order bits of the starting cylinder address for any disk access. At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 16-23. At the end of the command, this register is updated to reflect
the current LBA Bits 16-23.
The cylinder number may be from zero to the number of cylinders minus one.
9.4 Cylinder Low Register
This register contains the low order 8 bits of the starting cylinder address for any disk access. At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 8-15. At the end of the command, this register is updated to reflect
the current LBA Bits 8-15.
The cylinder number may be from zero to the number of cylinders minus one.
9.5 Data Register
This register is used to transfer data blocks between the device data buffer and the host. It is also the register
through which sector information is transferred on a Format Track command, and configuration information
is transferred on an Identify Device command.
All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide. Data transfers are
PIO only.
The register contains valid data only when D R Q = 1 in the Status Register.
68
O E M Specifications of DARA-2xxxxx 2.5 inch H D D Rev 2.1
Summary of Contents for DARA-206000 - Travelstar 12 GB Hard Drive
Page 2: ......
Page 9: ...Index 193 Contents vii...
Page 10: ...viii OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 13: ...Figure 2 Breathing hole caution of DARA 2xxxxx General 3...
Page 14: ...4 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 16: ...6 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 17: ...Part 1 Functional Specification Copyright IBM Corp 1999 7...
Page 18: ...8 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 70: ...60 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 71: ...Part 2 ATA Interface Specification Copyright IBM Corp 1999 61...
Page 72: ...62 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 74: ...64 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 76: ...66 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 112: ...102 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 196: ...186 OEM Specifications of DARA 2xxxxx 2 5 inch HDD Rev 2 1...
Page 206: ...Published in Japan S25L 1638 03...