When Online Spare memory is enabled, the first ranks of DIMM pair, 1A/8A, are set aside as
the sparing ranks. Therefore, the available memory is reduced by the size of the first ranks of DIMM
pair 1A/8A.
If a DIMM rank on either of the SMI buses exceeds its correctable ECC threshold, then the contents
of the failing DIMM ranks are copied to the spare DIMM ranks. Once the copy is complete, all
memory accesses to the previous failing DIMM ranks go to the spare DIMM ranks.
No performance penalty occurs for rank-sparing, other than the time it takes to copy the data from
the failing rank to the spare rank upon an error condition.
The following population rules apply to each memory cartridge. Begin with the DIMM installation
guidelines (
“DIMM installation guidelines” (page 35)
) with these additional constraints:
•
All installed processors must contain a valid sparing configuration.
•
If installing mixed rank DIMMs in a cartridge, follow the mixed rank installation rules of the
DIMM installation guidelines (
“DIMM installation guidelines” (page 35)
).
•
Rank sparing requires that the spare ranks of the DIMM pair 1A/8A be at least as large as
any other DIMM rank on the DDR3 channels of the cartridge. To determine the size of a single
rank in a DIMM, divide the total DIMM size by the number of ranks.
For example, the rank size of a dual-rank 2-GB DIMM is 1 GB and the rank size of a dual-rank
4-GB DIMM is 2 GB. Therefore, it is possible to support rank sparing with mixed DIMM pair
sizes in the cartridge if the 1A/8A pair is populated with the 4-GB DIMMs and the other pairs
are populated with either the identical 4-GB or 2-GB DIMMs (pairs C and D are not required
to be populated). In this case, the 2-GB rank size of the 4-GB DIMMs in the 1A/8A pair is
equal to or greater than the rank size of the other installed DIMMs.
However, the server cannot support DIMM sparing in this example if the 2-GB DIMMs are
populated in the 1A/8A pair locations and the 4-GB DIMMs are populated in any of the
remaining DIMM pair locations. This is because it violates the rule requiring that the spare
rank size of DIMM pair 1A/8A (1 GB) be equal to or larger than the single rank size of the
other DIMM pair locations, since the rank size of a 4-GB DIMM in pairs B, C, or D would be
larger (2 GB) than the spare rank size of the 2-GB DIMM pair in 1A/8A (1 GB).
Mirrored Memory population guidelines
Errors that are not corrected by ECC or SDDC cannot be corrected by Online Spare memory. By
providing added redundancy in the memory sub-system, Mirrored Memory provides the greatest
protection against memory failure beyond ECC, SDDC, and Online Spare memory.
In Mirrored Memory mode, each Lockstep DIMM pair of a memory controller (of a memory cartridge
connected to a processor) has a mirrored DIMM pair on the other memory cartridge of the sibling
processor in the same QPI island.
Upon detecting an uncorrectable memory error from a DIMM pair of a memory cartridge, the
processor avoids a system crash by reading the mirrored DIMM pairs from the other memory
cartridge. In this case, the system management routine disables the failed DIMM. Further memory
reads and writes will only occur on the mirrored DIMM pairs.
The exceptions to Mirrored Memory mode are the following:
•
In Mirrored Memory mode, half of the memory is allocated to memory protection.
•
The available memory bandwidth is reduced by up to 50% in this mode.
•
Mirrored Memory mode, Online Spare mode, Hemisphere mode, and interleaving cannot be
enabled simultaneously.
40
Removal and replacement procedures
