HP PA-8600 Specification Download Page 17

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gWLM 1.1.1 was first released with HP UX 11.i v2 HWE0505. It has the same issue with "uname -i" as
WLM. This only affects gWLM iCAP SRDs. VPAR, PSET and FSS SRDs work correctly in mixed
environments. The gWLM team plans to remedy this issue in the first maintenance release of gWLM.
Contact

[email protected]

for a workaround if you have a gWLM 1.1.1 customer who needs to

deploy an iCAP SRD on a mixed complex before the first maintenance release is available.

High Availability

NOTE:

NOTE: Online addition/replacement for cell boards is not currently supported and will be available in a
future HP UX release. Online addition/replacement of individual processors and memory DIMMs will
never be supported.)

Superdome high availability offering is as follows:

Processor:

Processor: The features below nearly eliminate the down time associated with processor cache
errors (which are the majority of processor errors).

Dynamic processor resilience w/ Instant Capacity enhancement.
Processor cache ECC protection and automatic de allocation
Processor bus parity protection
Redundant DC conversion

Memory

Memory: The memory subsystem design is such that a single SDRAM chip does not contribute
more than 1 bit to each ECC word. Therefore, the only way to get a multiple-bit memory error
from SDRAMs is if more than one SDRAM failed at the same time (rare event). The system is also
resilient to any cosmic ray or alpha particle strike because these failure modes can only affect
multiple bits in a single SDRAM. If a location in memory is "bad", the physical page is de-allocated
dynamically and is replaced with a new page without any OS or application interruption. In
addition, a combination of hardware and software scrubbing is used for memory. The software
scrubber reads/writes all memory locations periodically. However, it does not have access to
"locked-down" pages. Therefore, a hardware memory scrubber is provided for full coverage.
Finally data is protected by providing address/control parity protection.

Memory DRAM fault tolerance (i.e., recovery of a single SDRAM failure)
DIMM address/control parity protection
Dynamic memory resilience (i.e., page de-allocation of bad memory pages during
operation)
Hardware and software memory scrubbing
Redundant DC conversion
Cell COD

I/O

I/O: Partitions configured with dual path I/O can be configured to have no shared components
between them, thus preventing I/O cards from creating faults on other I/O paths. I/O cards in
hardware partitions (nPars) are fully isolated from I/O cards in other hard partitions. It is not
possible for an I/O failure to propagate across hard partitions. It is possible to dynamically repair
and add I/O cards to an existing running partition.

Full single-wire error detection and correction on I/O links
I/O cards fully isolated from each other
Hardware for the prevention of silent corruption of data going to I/O
On-line addition/replacement (OLAR) for individual I/O cards, some external peripherals,
SUB/HUB
Parity protected I/O paths
Dual path I/O

Crossbar and Cabinet Infrastructure

Crossbar and Cabinet Infrastructure:

Recovery of a single crossbar wire failure
Localization of crossbar failures to the partitions using the link
Automatic de-allocation of bad crossbar link upon boot

QuickSpecs

HP 9000 Superdome Servers (PA-8600, PA-8700, PA-

8800 and PA-8900)

Configuration

DA - 11721 Worldwide — Version 28 — October 23, 2009

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