
Table 8-12. DMAC Timing (E3473A)
Characteristic
Symbol
SH7050
Typical
(*1)
Worst Case
Unit
min
max
min
max
min
max
DREQ0
DREQ1
setup time
t
DRQS
27
-
37
-
DREQ0
DREQ1 hold
time
t
DRQH
30
-
30
-
DREQ0
DREQ1
pulse width
t
DRQW
1.5
-
1.5
-
DRAK output delay time
t
DRAKD
-
25
-
30
ns
*1 Typical outputs measured with 50pF load
Specifications and Characteristics
Electrical Specifications
88
Summary of Contents for E3472A
Page 9: ...Figure 1 Power Cords Available for Each Destination viii ...
Page 15: ...Contents xiv ...
Page 16: ...1 Product Overview Product Overview 1 ...
Page 22: ...2 Contents of HP E3472A 73A Contents of HP E3472A 73A 7 ...
Page 28: ...3 Setting up the Emulator Setting up the Emulator 13 ...
Page 34: ...4 Connecting to the Host Computer Connecting to the Host Computer 19 ...
Page 53: ...Note Connecting to the Host Computer Note 38 ...
Page 54: ...5 Connecting to the Target System Connecting to the Target System 39 ...
Page 59: ...Note Connecting to the Target System Note 44 ...
Page 60: ...6 Designing a Target System Designing a Target System 45 ...
Page 64: ...7 Using the Logic Analyzer Using the Logic Analyzer 49 ...
Page 71: ...Note Using the Logic Analyzer Note 56 ...
Page 72: ...8 Specifications and Characteristics Specifications and Characteristics 57 ...
Page 105: ...Note Specifications and Characteristics Note 90 ...
Page 106: ...9 Updating Firmware Updating Firmware 91 ...
Page 114: ...10 Solving Problems Solving Problems 99 ...
Page 131: ...Note Solving Problems Note 116 ...