HP E3472A, User Manual, Page: 100 / 153

Table 8-9. Clock Timing (E3473A)
Characteristic Symbol SH7050 Typical
(*1)
Worst Case Unit
min max min max min max
Operating frequency f
op
TBD 20 4 25 TBD 25 MHz
Clock cycle time t
cyc
50 TBD 50 250 50 TBD ns
Clock low-pulse width t
CL
20 - 19 - 17 - ns
Clock high-pulse width t
CH
20 - 24 - 17 - ns
Clock rise time t
cr
- 5 - 3 - 8 ns
Clock fall time t
cf
- 5 - 2 - 8 ns
EXTAL input frequency t
EX
TBD 10 4 10 TBD 10 MHz
EXTAL input cycle time t
Excyc
100 TBD 100 250 100 TBD ns
EXTAL input low-level pulse width t
EXL
TBD - 40 - TBD - ns
EXTAL input high-level pulse width t
EXH
TBD - 40 - TBD - ns
EXTAL input rise time t
EXR
- TBD - 5 - TBD ns
EXTAL input fall time t
EXF
- TBD - 5 - TBD ns
Reset Oscillation setting time t
OSC1
10 - 10 - 10 - ms
Software standby oscillation setting time t
OSC2
10 - 10 - 10 - ms
*1 Typical outputs measured with 50pF load
Specifications and Characteristics
Electrical Specifications
85