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If the failure symptoms include output current oscillation, check if the differentiator circuit is at fault by removing resistor
A2R16. If oscillations stop, the differentiator is probably at fault.
Troubleshooting OVP Circuit
Comparator A2U14D sets, and gate A2U17A resets flipflop A2U14B-A2U14C. TTL low at A2U14-1,8,13 inhibits the
PWM.
Circuit included. OVP Circuit and 2.5V bias supply on A2 control board.
Setup. The Main Troubleshooting Setup, Page 48, except connect the external supply to the unit’s + OUT ( + ) and - OUT
(-) terminals. Apply the ac mains voltage to the bias transformer. Adjust the unit’s OVP limit to 15Vdc. Set the external
supply (EXTERNAL) as instructed below.
Outputs:
SET VOLTAGE
NODE
EXTERNAL (Vdc)
SETUP
MEASUREMENT
A2U9 (OUT)
-
2.5Vdc
A2U14-10
10
1.0Vdc
A2U14-11
-
1.5Vdc
A2J3-13
10
Hi
A2J3-13
20
Lo
A2J3-13
10
Lo
A2J3-13
10
cycle power
Hi
Note:
Connecting a test probe to either input of either comparator in the OV Flipflop (pins A2U14-1, 6, 7, 8, 9,
14 or A2U11-13) may cause the flipflop to change states and cause the probed input to be low.
Troubleshooting PWM & Clock
The inputs to Inhibit Gate A2U19A and PWM gate A2U19B are the keys to PWM troubleshooting. The 20KHz Clock
starts each PWM output pulse, and the pulse stops when any of the inputs to A2U19A or A2U19B goes low. The PWM is
inhibited and prevented from initiating output pulses as long as any of the eight inputs are low.
Circuit Included. Pulse Width Modulator (PWM), Inhibit Gate A2U19A, Off-Pulse Oneshot, On-Pulse Oneshot, A2U17B,
20KHz Clock.
Setup. The Main Troubleshooting Setup, Page 48. Apply the ac mains voltage to the bias transformer and switch on the
LINE switch. Adjust the unit’s current setting above 1.0 Adc. Set the extemal supply (EXTERNAL) and adjust the unit’s
voltage setting (INTERNAL) as instructed below.
Summary of Contents for 6038A
Page 4: ......
Page 8: ......
Page 34: ...34 Figure 3 1 Troubleshooting Isolation ...
Page 35: ...35 Figure 3 1 Troubleshooting Isolation continued ...
Page 37: ...37 Figure 3 3 Clock and Primary SA Waveforms ...
Page 40: ...40 Figure 3 4 Readback and Secondary SA Waveforms ...
Page 56: ...56 Figure 3 7 Waveforms ...
Page 62: ...62 Figure 4 1 HP IB Block Diagram ...
Page 65: ...65 Figure 4 2 Front Panel Block Diagram ...
Page 90: ......
Page 93: ...93 Figure 6 1 Top View Top Covers Removed ...
Page 94: ...94 Figure 6 2 Main Board A1 Component Location ...
Page 95: ...95 Figure 6 3 Control Board A2 Component Location ...
Page 96: ...96 Figure 6 4 Front Panel Board A3 Component Location ...
Page 97: ...97 Figure 6 5 Power Mesh Board A4 Component Location ...
Page 98: ...98 Figure 6 6 HP IB Board A8 Component Location ...
Page 105: ...105 Figure 3 1 Troubleshooting Isolation option 001 ...
Page 106: ......